Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
10/2007
10/16/2007US7282949 FPGA powerup to known functional state
10/16/2007US7282948 MOS linear region impedance curvature correction
10/16/2007US7282947 Memory module and method having improved signal routing topology
10/11/2007WO2007115309A2 Apparatus and method for treating a workpiece with ionizing gas plasma
10/11/2007WO2007114821A1 Communication circuit with selectable signal voltage
10/11/2007WO2007114059A1 Data processing device
10/11/2007WO2007113765A1 Method and system for a signal driver using capacitive feedback
10/11/2007WO2007113712A1 Low operational power control including power-gating switches
10/11/2007US20070240093 Architecture and method for providing integrated circuits
10/11/2007US20070240092 Methods of Fabricating Application Specific Integrated Circuit (ASIC) Devices that Include Both Pre-Existing and New Integrated Circuit Functionality and Related ASIC Devices
10/11/2007US20070239914 Integrated Circuit Device that Stores a Value Representative of an Equalization Co-Efficient Setting
10/11/2007US20070236847 Electrostatic (ESD) protection circuit for an integrated circuit
10/11/2007US20070236844 Semiconductor device and system
10/11/2007US20070236255 High speed differential receiver with an integrated multiplexer input
10/11/2007US20070236254 Zero clock delay metastability filtering circuit
10/11/2007US20070236253 Semiconductor integrated circuit
10/11/2007US20070236252 Impedance converting circuit and electronic device
10/11/2007US20070236251 Level-shifting apparatus and panel display apparatus using the same
10/11/2007US20070236250 Enhanced scheme to implement an interconnection fabric using switching networks in hierarchy
10/11/2007US20070236249 Minimizing timing skew among chip level outputs for registered output signals
10/11/2007US20070236246 Radiation hardened differential output buffer
10/11/2007US20070236245 Superconductive crossbar switch
10/11/2007DE19820435B4 Signalsende- und Empfangsvorrichtung für das Leiterbahnsystem in einem Bauteil mit mehreren Logikwerten Signal transmitting and receiving apparatus for the conductor system in one component with a plurality of logic values
10/11/2007DE102006016356A1 Schaltungsanordnung zur Glitch-freien oder Glitch-reduzierten Signalübertragung zwischen Spannungsbereichen Circuitry for glitch-free or reduced glitch signal transmission between voltage ranges
10/10/2007EP1843471A2 Circuit configuration for glitch-free or reduced glitch signal transmission between voltage areas
10/10/2007EP1476945A4 Method and apparatus for selectably providing single-ended and differential signaling with controllable impedance and transition time
10/10/2007CN200959633Y Driving circuit of high-speed positive-negative level CCD device
10/10/2007CN101053158A Reconfigurable semiconductor integrated circuit and its processing allocation method
10/10/2007CN101051835A voltage position quasi displacement circuit
10/10/2007CN101051828A Surge separate circuit
10/10/2007CN101051445A Leve converter and panel display with said device
10/10/2007CN100342650C A fast controlled output buffer
10/09/2007US7281231 Integrated circuit structure and a design method thereof
10/09/2007US7280411 Output buffer circuit and semiconductor memory using the same
10/09/2007US7279995 Circuit for controlling the time duration of a signal
10/09/2007US7279937 Programmable amplitude line driver
10/09/2007US7279936 Logic basic cell, logic basic cell arrangement and logic device
10/09/2007US7279935 Method and apparatus for reducing clock enable setup time in a multi-enabled clock gating circuit
10/09/2007US7279934 Apparatus for delivering inputted signal data
10/09/2007US7279933 Output driver circuit
10/09/2007US7279932 Semiconductor integrated circuit device
10/09/2007US7279931 High voltage tolerance output stage
10/09/2007US7279930 Architecture for routing resources in a field programmable gate array
10/09/2007US7279929 Integrated circuit with programmable routing structure including straight and diagonal interconnect lines
10/09/2007US7279928 xB/yB coder programmed within an embedded array of a programmable logic device
10/09/2007US7279927 Integrated circuit with multiple power domains
10/09/2007US7279926 Headswitch and footswitch circuitry for power management
10/09/2007US7279925 Capacitive feedforward circuit, system, and method to reduce buffer propagation delay
10/04/2007WO2007112329A2 Radiation hardened differential output buffer
10/04/2007WO2007050882A3 A clocking architecture using a bi-directional reference clock
10/04/2007US20070234242 Logic circuit, logic circuit design method, logic circuit design system, and logic circuit design program
10/04/2007US20070229142 Gate driver output stage with bias circuit for high and wide operating voltage range
10/04/2007US20070229137 Level shift circuit capable of preventing occurrence of malfunction when low power supply fluctuates, and semiconductor integrated circuit including the circuit
10/04/2007US20070229116 Apparatus for implementing dynamic data path with interlocked keeper and restore devices
10/04/2007US20070229115 Method and apparatus for correcting duty cycle error in a clock distribution network
10/04/2007US20070229114 Interconnections for plural and hierarchical p1500 test wrappers
10/04/2007US20070229113 Analog voltage recovery circuit
10/04/2007US20070229112 Programmable crossbar signal processor with op-amp outputs
10/04/2007US20070229111 Programmable crossbar signal processor with rectification layer
10/03/2007EP1840965A2 Adjustable transistor body bias generation circuitry with latch-up prevention
10/03/2007CN101048936A Level shifter and voltage conversion device
10/03/2007CN101047384A 半导体器件 Semiconductor devices
10/03/2007CN101047383A Current controlled full-balance differential current transmitter
10/03/2007CN101047382A Level shifter
10/03/2007CN101047381A Voltage level conversion circuit, method and method for providing initial voltage
10/03/2007CN101047380A Common input/output terminal control circuit
10/03/2007CN101047379A Input/output port circuit
10/03/2007CN101047378A Output buffer circuit and system including the output buffer circuit
10/03/2007CN101047377A Asynchronous clock field signal switch-over structure based on logical type alternated
10/03/2007CN101047370A 触发电路 Trigger circuit
10/03/2007CN100341246C Open drain type output buffer
10/03/2007CN100341245C Integrated circuit equipment with data antiphase circuit
10/03/2007CN100341147C Chip terminating device in semiconductor IC and controlling method thereof
10/03/2007CN100340970C Programmable digital-analog mixer member arrangement
10/02/2007US7276943 Highly configurable PLL architecture for programmable logic
10/02/2007US7276940 Buffer/voltage-mirror arrangements for sensitive node voltage connections
10/02/2007US7276939 Semiconductor integrated circuit
10/02/2007US7276938 Transfer gate having overvoltage protection and method
10/02/2007US7276937 Modular interconnect circuitry for multi-channel transceiver clock signals
10/02/2007US7276936 Clock circuitry for programmable logic devices
10/02/2007US7276935 Input buffer with selectable threshold and hysteresis option
10/02/2007US7276934 Integrated circuit with programmable routing structure including diagonal interconnect lines
10/02/2007US7276933 Reconfigurable IC that has sections running at different looperness
10/02/2007US7276932 Power-gating cell for virtual power rail control
10/02/2007US7276931 System and method for creating replacements for obsolete computer chips
09/2007
09/27/2007WO2007109452A2 High speed voltage translator circuit
09/27/2007WO2007108406A1 Error tolerant method and semiconductor integrated circuit capable of realizing the method
09/27/2007WO2007108400A1 Testing apparatus, memory device and testing method
09/27/2007WO2007107957A1 Pseudo-synchronous small register designs with very low power consumption and methods to implement
09/27/2007WO2007059893A8 Semiconductor body, circuit arrangement having the semiconductor body and method
09/27/2007WO2007034384A3 Single threshold and single conductivity type logic
09/27/2007US20070222486 Driver circuit connected to pulse shaping circuitry
09/27/2007US20070222480 Circuit and method for latch bypass
09/27/2007US20070222479 Complementary signal generating circuit
09/27/2007US20070222478 Voltage level shift circuit
09/27/2007US20070222477 Fracturable lookup table and logic element
09/27/2007US20070222476 Semiconductor memory device testing on/off state of on-die-termination circuit during data read mode, and test method of the state of on-die-termination circuit
09/27/2007US20070222475 Low Swing Current Mode Logic Family
09/26/2007EP1837775A1 Reconfigurable signal processor
09/26/2007EP1836770A1 Non-volatile reconfigurable digital logic unit
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