| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
|---|
| 07/18/2007 | CN1327510C Single supply level converter |
| 07/18/2007 | CN101001082A Inverting dynamic register with data-dependent hold time reduction mechanism |
| 07/17/2007 | US7245632 External storage for modular computer systems |
| 07/17/2007 | US7245159 Protecting one-hot logic against short-circuits during power-on |
| 07/17/2007 | US7245157 Dynamic phase assignment optimization using skewed static buffers in place of dynamic buffers |
| 07/17/2007 | US7245156 Pre-drivers for current-mode I/O drivers |
| 07/17/2007 | US7245155 Data output circuit with improved overvoltage/surge protection |
| 07/17/2007 | US7245154 Differential input receiver with programmable failsafe |
| 07/17/2007 | US7245153 Level shift circuit having timing adjustment circuit for maintaining duty ratio |
| 07/17/2007 | US7245152 Voltage-level shifter |
| 07/17/2007 | US7245150 Combined multiplex or/flop |
| 07/17/2007 | US7245149 Dynamic programmable logic array having enable unit |
| 07/17/2007 | US7245147 Interface for a programmable logic device |
| 07/17/2007 | US7245146 Semiconductor device with termination resistance adjusting circuit |
| 07/17/2007 | US7245145 Memory module and method having improved signal routing topology |
| 07/12/2007 | WO2007078951A2 System and method for extending universal bus line length |
| 07/12/2007 | WO2007078840A1 Locally asynchronous, block-level synchronous, configurable logic blocks with sub-threshold analog circuits |
| 07/12/2007 | WO2007077928A1 Dynamic semiconductor device |
| 07/12/2007 | WO2007077437A1 Transimpedance amplifier protection circuits |
| 07/12/2007 | US20070159545 Managed memory component |
| 07/12/2007 | US20070159212 High efficiency two stage inverter |
| 07/12/2007 | US20070159211 Circuit for inspecting semiconductor device and inspecting method |
| 07/12/2007 | US20070159210 Operation mode setting circuit, LSI having operation mode setting circuit, and operation mode setting method |
| 07/12/2007 | DE102006000902B3 Drive circuit for transferring differential signals, has bus drivers for generating signal and complementary signal, where slew rate of signal and/or complementary signal is controlled and compensated depending on another signal |
| 07/12/2007 | DE10085336B4 Dual-Pseudo-Referenzspannungserzeugung für Empfänger Dual pseudo-reference voltage generation for receiver |
| 07/12/2007 | CA2635721A1 System and method for extending universal bus line length |
| 07/11/2007 | EP1806847A1 Data processing device having reconfigurable logic circuit |
| 07/11/2007 | EP1806846A1 High voltage digital driver with dynamically biased cascode transistors |
| 07/11/2007 | EP1362423A4 Self-terminating current mirror transceiver logic |
| 07/11/2007 | CN1998138A 高速时钟分配传输线网络 High-speed clock distribution network transmission line |
| 07/11/2007 | CN1996758A A bidirectional level conversion circuit |
| 07/11/2007 | CN1996601A Mask-programmable logic macro |
| 07/11/2007 | CN1326242C Semiconductor integrated circuit device |
| 07/10/2007 | US7243280 Semiconductor circuit apparatus and test method thereof |
| 07/10/2007 | US7242601 Deterministic addressing of nanoscale devices assembled at sublithographic pitches |
| 07/10/2007 | US7242249 Peaking transmission line receiver for logic signals |
| 07/10/2007 | US7242234 Edge-triggered flip-flop |
| 07/10/2007 | US7242222 Output circuit with reduced gate voltage swings |
| 07/10/2007 | US7242221 Selectable inversion of differential input and/or output pins in programmable logic devices |
| 07/10/2007 | US7242220 Signal transmitting system and method and signal driving device thereof |
| 07/10/2007 | US7242219 Circuit for parity tree structure |
| 07/10/2007 | US7242218 Techniques for combining volatile and non-volatile programmable logic on an integrated circuit |
| 07/10/2007 | US7242217 Output reporting techniques for hard intellectual property blocks |
| 07/10/2007 | US7242216 Embedding memory between tile arrangement of a configurable IC |
| 07/10/2007 | US7242215 Nanoscale latches and impedance-encoded logic for use in nanoscale state machines, nanoscale pipelines, and in other nanoscale electronic circuits |
| 07/10/2007 | US7242214 Semiconductor integrated circuits with power reduction mechanism |
| 07/05/2007 | WO2007075962A2 Programmable logic device with serial interconnect |
| 07/05/2007 | WO2007073767A1 Over-voltage and under voltage protection circuit |
| 07/05/2007 | WO2007073647A1 Interconnect structure between hyper-transport bus interface boards |
| 07/05/2007 | WO2007010503A3 4-level logic decoder |
| 07/05/2007 | US20070157349 Method of Fabricating an Integrated Circuit to Improve Soft Error Performance |
| 07/05/2007 | US20070157146 Method of packing-based macro placement and semiconductor chip using the same |
| 07/05/2007 | US20070152738 Pull-up circuit |
| 07/05/2007 | US20070152735 Semiconductor integrated circuit device |
| 07/05/2007 | US20070152714 Logic circuit |
| 07/05/2007 | US20070152713 Magnetic Transistor with the OR/NOR/NAND/AND Functions |
| 07/05/2007 | US20070152712 I/O cell capable of finely controlling drive strength related application |
| 07/05/2007 | US20070152711 Level shifter output buffer circuit usable as an isolation cell |
| 07/05/2007 | US20070152710 Single and composite binary and multi-valued logic functions from gates and inverters |
| 07/05/2007 | US20070152709 Safety system based on reconfigurable array of logic gates |
| 07/05/2007 | US20070152708 MPGA products based on a prototype FPGA |
| 07/05/2007 | US20070152707 Integrated circuits with RAM and ROM fabrication options |
| 07/05/2007 | US20070152706 Semiconductor integrated circuit |
| 07/05/2007 | US20070152705 Transmission circuit, data transfer control device and electronic equipment |
| 07/05/2007 | US20070152704 Method for calibrating a driver and on-die termination of a synchronous memory device |
| 07/05/2007 | US20070152703 Detecting counterfeit products |
| 07/05/2007 | DE10354501B4 Logik-Schaltkreis-Anordnung Logic circuit arrangement |
| 07/04/2007 | EP1804384A2 Distributed memory in field-programmable gate array integrated circuit devices |
| 07/04/2007 | EP1803222A2 Low voltage, high-speed output-stage for laser or modulator driving |
| 07/04/2007 | CN1993889A Combinatorial logic circuit |
| 07/04/2007 | CN1993888A Method and device for the connection of inputs for microcontrollers and corresponding microcontroller |
| 07/04/2007 | CN1992526A Level shift circuit and driver circuit using the same |
| 07/04/2007 | CN1992525A 电平移动电路 A level shift circuit |
| 07/04/2007 | CN1992489A Charge pump circuit and semiconductor device having the same |
| 07/04/2007 | CN1992269A 半导体集成电路设备 The semiconductor integrated circuit device |
| 07/04/2007 | CN1992071A Distributed memory in field-programmable gate array integrated circuit devices |
| 07/04/2007 | CN1991659A 半导体集成电路 The semiconductor integrated circuit |
| 07/04/2007 | CN1324707C Semiconductor integrated circuits |
| 07/04/2007 | CN1324685C 半导体集成电路 The semiconductor integrated circuit |
| 07/04/2007 | CN1324298C 传感器控制器 Sensor Controller |
| 07/03/2007 | US7240140 Efficient detection of multiple assertions in a bus |
| 07/03/2007 | US7240085 Faster shift value calculation using modified carry-lookahead adder |
| 07/03/2007 | US7239495 Output circuit with transistor overcurrent protection |
| 07/03/2007 | US7239251 Multi-bit digital input using a single pin |
| 07/03/2007 | US7239191 Level shifting circuit |
| 07/03/2007 | US7239185 Driver circuit connected to pulse shaping circuitry |
| 07/03/2007 | US7239182 Predriver circuit |
| 07/03/2007 | US7239181 Semiconductor device |
| 07/03/2007 | US7239180 Programmable pin impedance reduction on multistandard input/outputs |
| 07/03/2007 | US7239179 Level conversion circuit, power supply voltage generation circuit, shift circuit, shift register circuit, and display apparatus |
| 07/03/2007 | US7239178 Circuit and method for CMOS voltage level translation |
| 07/03/2007 | US7239177 High voltage tolerant off chip driver circuit |
| 07/03/2007 | US7239176 Voltage tolerant protection circuit for input buffer |
| 07/03/2007 | US7239175 Look-up table based logic macro-cells |
| 07/03/2007 | US7239174 Programmable interconnect structures |
| 07/03/2007 | US7239173 Programmable memory element with power save mode in a programmable logic device |
| 07/03/2007 | US7239172 Impedance matching |
| 07/03/2007 | US7239170 Apparatus and methods for improved input/output cells |
| 07/03/2007 | US7239169 Semiconductor apparatus capable of preventing occurrence of multiple reflection, driving method, and setting method thereof |
| 06/28/2007 | WO2007071506A1 A method for multi-cycle clock gating |