Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
---|
04/17/2007 | US7205793 Self-programmable bidirectional buffer circuit and method |
04/17/2007 | US7205791 Bypass-able carry chain in a programmable logic device |
04/17/2007 | US7205790 Programmable integrated circuit providing efficient implementations of wide logic functions |
04/17/2007 | US7205788 Programmable on-chip differential termination impedance |
04/17/2007 | US7205786 Programmable output buffer |
04/17/2007 | US7205785 Apparatus and method for repairing logic blocks |
04/17/2007 | US7205589 Semiconductor devices fabricated with different processing options |
04/12/2007 | WO2007041321A1 Low-voltage down converter |
04/12/2007 | WO2007040192A1 Reconfigurable semiconductor integrated circuit and its processing allocation method |
04/12/2007 | US20070083339 Broadband differential coupling devices, systems and methods |
04/12/2007 | US20070080720 Semiconductor integrated circuit |
04/12/2007 | US20070080719 Buffer |
04/12/2007 | US20070080718 High speed signaling system with adaptive transmit pre-emphasis |
04/12/2007 | US20070080717 Semiconductor Device |
04/12/2007 | US20070080716 Hot plug control apparatus and method |
04/12/2007 | US20070080715 Quad state logic design methods, circuits, and systems |
04/12/2007 | US20070080714 Flip-flop circuit |
04/12/2007 | US20070080713 Circuit architecture for an integrated circuit |
04/12/2007 | US20070080712 Semiconductor memory apparatus and method of resetting input/output lines of the same |
04/12/2007 | US20070080711 Dedicated Logic Cells Employing Sequential Logic and Contol Logic Functions |
04/12/2007 | US20070080710 Interconnection resources for programmable logic integrated circuit devices |
04/12/2007 | US20070080709 Integrated circuit communication techniques |
04/12/2007 | US20070080708 H-bridge circuit with shoot through current prevention during power-up |
04/12/2007 | US20070080707 Selective on-die termination for improved power management and thermal distribution |
04/12/2007 | DE19950359B4 Eingabe-Ausgabe-Puffer mit verringertem Rückkoppelungseffekt Input-output buffer with reduced feedback effect |
04/11/2007 | EP1772966A2 Circuit architecture for an integrated circuit |
04/11/2007 | CN1947338A Leakage current reduction method |
04/11/2007 | CN1945973A Voltage-current conversion circuit device |
04/11/2007 | CN1310327C Semiconductor integrated circuit having on-chip termination |
04/11/2007 | CN1310326C Self-reparable semiconductor and method thereof |
04/10/2007 | US7203789 Architecture and methods for computing with reconfigurable resistor crossbars |
04/10/2007 | US7203714 Logic circuit |
04/10/2007 | US7202727 Bi-directional signal level shift circuit |
04/10/2007 | US7202710 Apparatus and method for handling interdevice signaling |
04/10/2007 | US7202706 Systems and methods for actively-peaked current-mode logic |
04/10/2007 | US7202705 Dynamic logic circuit apparatus and method for reducing leakage power consumption via separate clock and output stage control |
04/10/2007 | US7202704 Leakage sensing and keeper circuit for proper operation of a dynamic circuit |
04/10/2007 | US7202703 Single stage level restore circuit with hold functionality |
04/10/2007 | US7202702 Output buffer slew rate control using clock signal |
04/10/2007 | US7202701 Input/output circuit for handling unconnected I/O pads |
04/10/2007 | US7202700 Semiconductor device which exhibits high-speed performance and low power consumption |
04/10/2007 | US7202699 Voltage tolerant input buffer |
04/10/2007 | US7202698 Integrated circuit having a programmable input structure with bounce capability |
04/10/2007 | US7202697 Programmable logic block having improved performance when functioning in shift register mode |
04/10/2007 | US7202696 Circuit for temperature and beta compensation |
04/05/2007 | WO2007037862A2 Method of linearizing esd capacitance |
04/05/2007 | WO2007037384A1 System having a self-synchronization type processing unit |
04/05/2007 | WO2007037212A1 Light receiving circuit and digital system |
04/05/2007 | WO2007037110A1 Electronic device, load variation compensating circuit, power supply apparatus, and testing apparatus |
04/05/2007 | WO2007036020A1 Semiconductor integrated circuit having current leakage reduction scheme |
04/05/2007 | US20070075760 Source drive circuit |
04/05/2007 | US20070075746 System and method for glitch detection in a secure microcontroller |
04/05/2007 | US20070075745 Output driver for controlling impedance and intensity of pre-emphasis driver using mode register set |
04/05/2007 | US20070075744 Circuits having precision voltage clamping levels and method |
04/05/2007 | US20070075743 Semiconductor integrated circuit having current leakage reduction scheme |
04/05/2007 | US20070075742 Tileable field-programmable gate array architecture |
04/05/2007 | US20070075741 Dedicated Logic Cells Employing Sequential Logic and Control Logic Functions |
04/05/2007 | US20070075740 Dedicated Logic Cells Employing Configurable Logic and Dedicated Logic Functions |
04/05/2007 | US20070075739 Dedicated Logic Cells Employing Configurable Logic and Dedicated Logic Functions |
04/05/2007 | US20070075738 Semiconductor integrated circuit device |
04/05/2007 | US20070075737 Configurable Circuits, IC's, and Systems |
04/05/2007 | US20070075736 FPGA powerup to known functional state |
04/05/2007 | US20070075735 xB/yB coder programmed within an embedded array of a programmable logic device |
04/05/2007 | US20070075734 Reconfigurable network on a chip |
04/05/2007 | US20070075733 Fpga powerup to known functional state |
04/05/2007 | US20070075732 System and method for using dummy cycles to mask operations in a secure microcontroller |
04/05/2007 | US20070075731 Method and apparatus for reducing noise in a dynamic manner |
04/05/2007 | US20070075730 Data transfer circuit for transferring data between a first circuit block and a second circuit block |
04/05/2007 | US20070075729 Digital programmable phase generator |
04/04/2007 | EP1770865A1 Area efficient fracturable logic elements |
04/04/2007 | EP1769300A2 Systems and methods for minimizing static leakage of an integrated circuit |
04/04/2007 | EP1395894A4 Low power clock distribution methodology |
04/04/2007 | CN1941632A Two-way dynamic duplicator |
04/04/2007 | CN1941631A 半导体集成电路 The semiconductor integrated circuit |
04/04/2007 | CN1941630A Open-loop slew-rate controlled output driver |
04/04/2007 | CN1941629A Apparatus and method for controlling on die termination |
04/04/2007 | CN1309167C Inductive proximity sensor and related methods |
04/03/2007 | US7200824 Performance/power mapping of a die |
04/03/2007 | US7200821 Receiver and method for mitigating temporary logic transitions |
04/03/2007 | US7200781 Detecting and diagnosing a malfunctioning host coupled to a communications bus |
04/03/2007 | US7200759 Method and device for making information contents of a volatile semiconductor memory irretrievable |
04/03/2007 | US7200735 High-performance hybrid processor with configurable execution units |
04/03/2007 | US7199639 Semiconductor device with level converter having signal-level shifting block and signal-level determination block |
04/03/2007 | US7199638 High speed voltage level translator |
04/03/2007 | US7199619 High-speed differential logic multiplexer |
04/03/2007 | US7199618 Logic circuit arrangement |
04/03/2007 | US7199616 Method and apparatus to generate break before make signals for high speed TTL driver |
04/03/2007 | US7199615 High speed signaling system with adaptive transmit pre-emphasis and reflection cancellation |
04/03/2007 | US7199614 Over-voltage tolerant bus hold circuit and method therefor |
04/03/2007 | US7199613 Reducing coupling effect on reference voltages when output buffers implemented with low voltage transistors generate high voltage output signals |
04/03/2007 | US7199612 Method and circuit for reducing HCI stress |
04/03/2007 | US7199611 System to temporarily modify an output waveform |
04/03/2007 | US7199610 Integrated circuit interconnect structure having reduced coupling between interconnect lines |
04/03/2007 | US7199609 Dedicated input/output first in/first out module for a field programmable gate array |
04/03/2007 | US7199608 Programmable logic device and method of configuration |
04/03/2007 | US7199607 Pin multiplexing |
04/03/2007 | US7199606 Current limiter of output transistor |
04/03/2007 | US7199605 Method and apparatus for low capacitance, high output impedance driver |
04/03/2007 | US7199604 Driver circuit with low power termination mode |
04/03/2007 | US7199603 Increment/decrement, chip select and selectable write to non-volatile memory using a two signal control protocol for an integrated circuit device |