| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
|---|
| 02/13/2007 | US7177381 Noise-resistive, burst-mode receiving apparatus and a method for recovering a clock signal and data therefrom |
| 02/13/2007 | US7176752 Plate voltage generation circuit capable controlling dead band |
| 02/13/2007 | US7176745 Semiconductor device |
| 02/13/2007 | US7176741 Level shift circuit |
| 02/13/2007 | US7176740 Level conversion circuit |
| 02/13/2007 | US7176729 Semiconductor integrated circuit controlling output impedance and slew rate |
| 02/13/2007 | US7176728 High voltage low power driver |
| 02/13/2007 | US7176725 Fast pulse powered NOR decode apparatus for semiconductor devices |
| 02/13/2007 | US7176724 High speed chip-to-chip communication links |
| 02/13/2007 | US7176723 Translator circuit and method therefor |
| 02/13/2007 | US7176722 Low power high performance inverter circuit |
| 02/13/2007 | US7176721 Signal receiver with data precessing function |
| 02/13/2007 | US7176720 Low duty cycle distortion differential to CMOS translator |
| 02/13/2007 | US7176719 Capacitively-coupled level restore circuits for low voltage swing logic circuits |
| 02/13/2007 | US7176718 Organizations of logic modules in programmable logic devices |
| 02/13/2007 | US7176717 Programmable logic and routing blocks with dedicated lines |
| 02/13/2007 | US7176716 Look-up table structure with embedded carry logic |
| 02/13/2007 | US7176715 Computer combinatorial multipliers in programmable logic devices |
| 02/13/2007 | US7176714 Multiple data rate memory interface architecture |
| 02/13/2007 | US7176713 Integrated circuits with RAM and ROM fabrication options |
| 02/13/2007 | US7176712 Line reflection reduction with energy-recovery driver |
| 02/13/2007 | US7176711 On-die termination impedance calibration device |
| 02/13/2007 | US7176710 Dynamically adjustable termination impedance control techniques |
| 02/13/2007 | US7176709 Receiving device |
| 02/13/2007 | US7176708 Receiver circuit |
| 02/08/2007 | WO2007016699A2 Method and system for debug and test using replicated logic |
| 02/08/2007 | WO2007015479A1 Programmable logic array and programmable logic array module generator |
| 02/08/2007 | WO2007015442A1 Semiconductor integrated circuit |
| 02/08/2007 | WO2006033944A3 Latch-based serial port output buffer |
| 02/08/2007 | US20070030718 Magnetic logic system |
| 02/08/2007 | US20070030048 Voltage Switching Circuit |
| 02/08/2007 | US20070030032 Fault Tolerant NAND Gate Circuit |
| 02/08/2007 | US20070030031 Circuit and method for calculating a logic combination of two encrypted input operands |
| 02/08/2007 | US20070030030 Method and apparatus for selecting an operating mode based on a determination of the availability of internal clock signals |
| 02/08/2007 | US20070030029 Interconnection and input/output resources for programmable logic integrated circuit devices |
| 02/08/2007 | US20070030028 Programmable array logic circuit employing non-volatile ferromagnetic memory cells |
| 02/08/2007 | US20070030027 Programmable interconnect structures |
| 02/08/2007 | US20070030026 Multiple-time programming apparatus and method using one-time programming element |
| 02/08/2007 | US20070030025 Semiconductor memory device including on die termination circuit and on die termination method thereof |
| 02/08/2007 | DE102004019345B4 Ausgangsstufenanordnung Output stage system |
| 02/07/2007 | EP1749343A2 Schottky device |
| 02/07/2007 | EP1010205B1 Lone-electron circuit arrangement, operating mode, and application for adding binary numbers |
| 02/07/2007 | CN1909371A Output driver with maintained slew rate |
| 02/07/2007 | CN1299464C Method and device for realizing main backup of clock in synchronizing system |
| 02/07/2007 | CN1299431C Interface circuit for differential signal |
| 02/07/2007 | CN1299351C Semiconductor device and its producing method |
| 02/06/2007 | US7174486 Automation of fuse compression for an ASIC design system |
| 02/06/2007 | US7174470 Computer data bus interface control |
| 02/06/2007 | US7174443 Run-time reconfiguration method for programmable units |
| 02/06/2007 | US7174400 Integrated circuit device that stores a value representative of an equalization co-efficient setting |
| 02/06/2007 | US7174375 Modular computer system management |
| 02/06/2007 | US7173549 Semiconductor integrated circuit in which voltage down converter output can be observed as digital value and voltage down converter output voltage is adjustable |
| 02/06/2007 | US7173473 Level-shifting circuitry having “high” output impedance during disable mode |
| 02/06/2007 | US7173472 Input buffer structure with single gate oxide |
| 02/06/2007 | US7173458 Semiconductor device |
| 02/06/2007 | US7173456 Dynamic logic return-to-zero latching mechanism |
| 02/06/2007 | US7173455 Repeater circuit having different operating and reset voltage ranges, and methods thereof |
| 02/06/2007 | US7173454 Display device driver circuit |
| 02/06/2007 | US7173453 Method and circuit for translating a differential signal to complementary CMOS levels |
| 02/06/2007 | US7173451 Programmable logic circuit apparatus and programmable logic circuit reconfiguration method |
| 02/06/2007 | US7173450 Bus controller |
| 02/06/2007 | US7173449 Signal transmission system |
| 02/06/2007 | US7173448 Apparatus and method of error detection and correction in a radiation-hardened static random access memory field-programmable gate array |
| 02/06/2007 | US7173340 Daisy chaining of serial I/O interface on stacking devices |
| 02/01/2007 | WO2004083904A3 Optical interconnect structure in a computer system |
| 02/01/2007 | US20070028193 Multiple voltage integrated circuit and design method therefor |
| 02/01/2007 | US20070024345 Semiconductor integrated circuit apparatus |
| 02/01/2007 | US20070024344 Semiconductor integrated circuit |
| 02/01/2007 | US20070024343 Semiconductor integrated circuit apparatus |
| 02/01/2007 | US20070024342 Semiconductor integrated circuit apparatus |
| 02/01/2007 | US20070024322 Leakage current reduction scheme for domino circuits |
| 02/01/2007 | US20070024321 Semiconductor cmos transistors and method of manufacturing the same |
| 02/01/2007 | US20070024320 Multi-standard transmitter |
| 02/01/2007 | US20070024319 Configurable logic circuit arangement |
| 02/01/2007 | US20070024318 Automatic extension of clock gating technique to fine-grained power gating |
| 02/01/2007 | US20070024316 Circuit personalization |
| 02/01/2007 | DE10227618B4 Logikschaltung Logic circuit |
| 02/01/2007 | DE102006033273A1 Optical AND element useful for optical label process, comprises semiconductor laser having saturable absorption regions, electrodes of the saturable absorption regions being separated from each other, and light inputting section |
| 02/01/2007 | DE102005037357B3 Logic circuit for calculating result operand esp. for safety-sensitive applications, has two logic stages with first between input and intermediate node, and second between intermediate nodes and output |
| 01/31/2007 | CN1906853A 上拉电路 Pull-ups |
| 01/31/2007 | CN1905371A Voltage converting circuit |
| 01/31/2007 | CN1298108C Magnetic logic elements |
| 01/31/2007 | CN1298107C Signal-level converter |
| 01/30/2007 | US7171599 Field programmable device |
| 01/30/2007 | US7170960 Instantaneous clock recovery circuit |
| 01/30/2007 | US7170438 Decision feedback equalizer with bi-directional mode and lookup table |
| 01/30/2007 | US7170320 Fast pulse powered NOR decode apparatus with pulse stretching and redundancy steering |
| 01/30/2007 | US7170319 Method and an apparatus to reduce duty cycle distortion |
| 01/30/2007 | US7170318 Impedance controller and impedance control method |
| 01/30/2007 | US7170316 Programmable logic array latch |
| 01/30/2007 | US7170315 Programmable system on a chip |
| 01/30/2007 | US7170314 Multiple channel modules and bus systems using same |
| 01/30/2007 | US7170313 Apparatus for calibrating termination voltage of on-die termination |
| 01/30/2007 | US7170121 Computer system architecture using a proximity I/O switch |
| 01/30/2007 | US7170116 Integrated circuit well bias circuitry |
| 01/25/2007 | WO2007011480A1 I/o circuitry for reducing ground bounce and vcc sag in integrated circuit devices |
| 01/25/2007 | WO2006023008A3 An interconnection fabric using switching networks in hierarchy |
| 01/25/2007 | WO2005117144A3 Gate driver output stage with bias circuit for high and wide operating voltage range |
| 01/25/2007 | WO2005088839A8 Programmable logic array for schedule-controlled processing |
| 01/25/2007 | US20070019695 Optical and element |