Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
12/2005
12/14/2005CN1707811A Method of fabrication of printed transistors
12/14/2005CN1707810A Thin film transistor and method of fabricating the same
12/14/2005CN1707809A Semiconductor device
12/14/2005CN1707808A Method and structure for providing tuned leakage current in CMOS integrated circuit
12/14/2005CN1707807A High-breakdown voltage transistor with high electronic mobility
12/14/2005CN1707803A Nonvolatile semiconductor memory device for increasing coupling ratio, and fabrication method thereof
12/14/2005CN1707802A 背栅FinFET SRAM Back gate FinFET SRAM
12/14/2005CN1707799A Semiconductor integrated circuit, booster circuitry, and capacitor
12/14/2005CN1707798A Nonvolatile semiconductor memory device and manufacturing method thereof
12/14/2005CN1707796A Nonvolatile semiconductor memory device and a method of the same
12/14/2005CN1707795A Memory device and its manufacturing method
12/14/2005CN1707791A Electrical fuses structure
12/14/2005CN1707790A Semiconductor device formed having a metal layer for conducting the device current and for high contrast marking and method thereof
12/14/2005CN1707776A Method for producing elements with memory cells and memory cell array
12/14/2005CN1707775A Computer implemented method for designing a semiconductor device, an automated design system and a semiconductor device
12/14/2005CN1707762A Zener diode and method for fabricating the same
12/14/2005CN1707756A Semiconductor device with low contact resistance and method for fabricating the same
12/14/2005CN1707755A Method for manufacturing gate electrode of semiconductor device using aluminium nitride film
12/14/2005CN1707754A Method for forming polycrystalline Si and MOSFET device in Si-based material
12/14/2005CN1707749A Semiconductor device, method for manufacturing the same, liquid crystal television and EL television
12/14/2005CN1707486A Circuit simulation method, device model, and simulation circuit
12/14/2005CN1707342A Liquid crystal display device and method of fabricating same
12/14/2005CN1707340A Liquid crystal display device and fabricating method thereof
12/14/2005CN1706925A Post-dry etching cleaning liquid composition and process for fabricating semiconductor device
12/14/2005CN1231978C Insulated-gate semiconductor apparatus
12/14/2005CN1231977C High-voltage semiconductor device
12/14/2005CN1231975C Semi-conductor device
12/14/2005CN1231921C Nonvolatile semiconductor memory device
12/14/2005CN1231803C Reflection electrooptical device and electronic equipment
12/13/2005US6975924 Method and apparatus for controlling the strategy of compounding pharmaceutical admixtures
12/13/2005US6975551 Semiconductor storage, mobile electronic device, and detachable storage
12/13/2005US6975545 Non-volatile memory cell
12/13/2005US6975533 Hybrid semiconductor—magnetic spin based memory with low transmission barrier
12/13/2005US6975375 Semipermeable liquid crystal display device and manufacturing method thereof
12/13/2005US6975295 Liquid crystal display device
12/13/2005US6975142 Semiconductor device
12/13/2005US6975102 Apparatus and method for analyzing capacitance of insulator
12/13/2005US6975023 Co-packaged control circuit, transistor and inverted diode
12/13/2005US6975019 Semiconductor memory device having a multi-layered interlayer insulation consisting of deuterium and nitride
12/13/2005US6975018 Semiconductor device
12/13/2005US6975017 Healing of micro-cracks in an on-chip dielectric
12/13/2005US6975015 Modulated trigger device
12/13/2005US6975014 Method for making an ultra thin FDSOI device with improved short-channel performance
12/13/2005US6975013 Diode and method for manufacturing the same
12/13/2005US6975007 Semiconductor device including a polysilicon, barrier structure, and tungsten layer electrode
12/13/2005US6975006 Semiconductor device with modified channel compressive stress
12/13/2005US6975004 Semiconductor component with optimized current density
12/13/2005US6975003 Semiconductor CMOS SOI
12/13/2005US6975001 Semiconductor device and method of fabricating the same
12/13/2005US6975000 Method of forming a recessed buried-diffusion device
12/13/2005US6974999 Semiconductor device and method of manufacturing the same
12/13/2005US6974998 Field effect transistor with corner diffusions for reduced leakage
12/13/2005US6974997 High-voltage MOS transistor
12/13/2005US6974996 Semiconductor device and method of manufacturing the same
12/13/2005US6974995 Method and system for forming dual gate structures in a nonvolatile memory using a protective layer
12/13/2005US6974994 Capacitor with a geometrical layout
12/13/2005US6974988 DRAM cell structure capable of high integration and fabrication method thereof
12/13/2005US6974983 Isolated FinFET P-channel/N-channel transistor pair
12/13/2005US6974982 Method of manufacturing semiconductor device and semiconductor device
12/13/2005US6974981 Isolation structures for imposing stress patterns
12/13/2005US6974977 Heterojunction bipolar transistor
12/13/2005US6974975 Solid-state imaging device, method for driving solid-state imaging device, and method for processing image signal
12/13/2005US6974973 Apparatus for determining temperature of an active pixel imager and correcting temperature induced variations in an imager
12/13/2005US6974972 Thin-film transistor, and liquid crystal display device using the same
12/13/2005US6974971 Matrix array devices with flexible substrates
12/13/2005US6974969 P-type quantum-well-base bipolar transistor device employing interdigitated base and emitter formed with a capping layer
12/13/2005US6974967 Quantum logic gate and quantum logic operation method using exciton
12/13/2005US6974966 Multiple epitaxial region wafers with optical connectivity
12/13/2005US6974953 Infrared sensor device and manufacturing method thereof
12/13/2005US6974779 Interfacial oxidation process for high-k gate dielectric process integration
12/13/2005US6974775 Method and apparatus for making an imprinted conductive circuit using semi-additive plating
12/13/2005US6974766 In situ deposition of a low κ dielectric layer, barrier layer, etch stop, and anti-reflective coating for damascene application
12/13/2005US6974764 Method for making a semiconductor device having a metal gate electrode
12/13/2005US6974757 Method of forming silicon-on-insulator comprising integrated circuitry
12/13/2005US6974755 Isolation structure with nitrogen-containing liner and methods of manufacture
12/13/2005US6974753 Method of manufacturing lateral MOSFET structure of an integrated circuit having separated device regions
12/13/2005US6974752 Methods of fabricating integrated circuit devices having uniform silicide junctions
12/13/2005US6974751 Semiconductor device and method for producing the same
12/13/2005US6974750 Process for forming a trench power MOS device suitable for large diameter wafers
12/13/2005US6974748 Semiconductor device with split gate electrode structure and method for manufacturing the semiconductor device
12/13/2005US6974747 Method of manufacturing semiconductor device
12/13/2005US6974746 Method of manufacturing a nonvolatile semiconductor memory device having a stacked gate structure
12/13/2005US6974743 Method of making encapsulated spacers in vertical pass gate DRAM and damascene logic gates
12/13/2005US6974738 Nonplanar device with stress incorporation layer and method of fabrication
12/13/2005US6974737 Schottky barrier CMOS fabrication method
12/13/2005US6974736 Method of forming FET silicide gate structures incorporating inner spacers
12/13/2005US6974735 Dual layer Semiconductor Devices
12/13/2005US6974733 Double-gate transistor with enhanced carrier mobility
12/13/2005US6974732 Semiconductor device method of manufacturing
12/13/2005US6974730 Method for fabricating a recessed channel field effect transistor (FET) device
12/13/2005US6974729 Integrated semiconductor fin device and a method for manufacturing such device
12/13/2005US6974720 Methods of forming power semiconductor devices using boule-grown silicon carbide drift layers and power semiconductor devices formed thereby
12/13/2005US6974716 Method for fabricating a titanium nitride sensing membrane on an EGFET
12/13/2005US6973844 Semiconductor mechanical quantity sensor
12/13/2005US6973836 Semiconductor pressure sensor having diaphragm
12/08/2005WO2005117157A1 Organic compound having at both ends different functional groups differing in reactivity in elimination reaction, organic thin films, organic device, and processes for producing these
12/08/2005WO2005117151A1 Positive electrode structure and gallium nitride-based compound semiconductor light-emitting device
12/08/2005WO2005117135A1 Tunnel junctions for long-wavelength vcsels
12/08/2005WO2005117134A1 Diode and thyristor
12/08/2005WO2005117133A2 Esd-protection structures for semiconductor components
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