Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
11/2005
11/17/2005WO2005083788A3 Semiconductor devices having thermal spacers
11/17/2005WO2005081768A3 Schottky-barrier tunneling transistor
11/17/2005WO2005071722B1 Selective etch of films with high dielectric constant
11/17/2005WO2005060464A3 Method and apparatus for forming an soi body-contacted transistor
11/17/2005WO2005048299A3 Transistor having three electronically isolated electrodes and method of formation
11/17/2005WO2004105090A3 Structure and method for forming a trench mosfet having self-aligned features
11/17/2005WO2004064207A3 Quantum dot devices having proximity-placed acceptor impurities
11/17/2005US20050257029 Adaptive processor architecture incorporating a field programmable gate array control element having at least one embedded microprocessor core
11/17/2005US20050256007 Adiabatic quantum computation with superconducting qubits
11/17/2005US20050255715 Manufacturing method of composite sheet material using ultrafast laser pulses
11/17/2005US20050255711 Method for forming underlying insulation film
11/17/2005US20050255706 Method for manufacturing semiconductor device
11/17/2005US20050255699 Method for controlling voiding and bridging in silicide formation
11/17/2005US20050255688 Semiconductor device and manufacturing method thereof, electro-optical device and manufacturing method thereof, and electronic apparatus
11/17/2005US20050255684 Implantation of deuterium in MOS and DRAM devices
11/17/2005US20050255682 Process for transferring a layer of strained semiconductor material
11/17/2005US20050255681 Method of forming pre-metal dielectric layer
11/17/2005US20050255679 Thin film semiconductor device
11/17/2005US20050255678 Method for manufacturing semiconductor substrate and method for manufacturing semiconductor device
11/17/2005US20050255667 Method of inducing stresses in the channel region of a transistor
11/17/2005US20050255666 Method and structure for aligning mechanical based device to integrated circuits
11/17/2005US20050255661 Semiconductor device and manufacturing method therefor
11/17/2005US20050255659 CMOS transistor using high stress liner layer
11/17/2005US20050255658 Flash memory cell and manufacturing method thereof
11/17/2005US20050255657 Methods of forming a nonvolatile memory device having a local SONOS structure that use spacers to adjust the overlap between a gate electrode and a charge trapping layer
11/17/2005US20050255656 Field effect transistor (FET) devices and methods of manufacturing FET devices
11/17/2005US20050255655 N-channel LDMOS with buried P-type region to prevent parasitic bipolar effects
11/17/2005US20050255653 Integrated circuit devices having uniform silicide junctions
11/17/2005US20050255650 Semiconductor device
11/17/2005US20050255647 Vertical NROM having a storage density of 1 bit per 1F2
11/17/2005US20050255645 Anti-stiction technique for thin film and wafer-bonded encapsulated microelectromechanical systems
11/17/2005US20050255643 Method of forming fin field effect transistor using damascene process
11/17/2005US20050255642 Method of fabricating inlaid structure
11/17/2005US20050255641 Semiconductor device and method of manufacturing the same
11/17/2005US20050255640 Methods for producing uniform large-grained and grain boundary location manipulated polycrystalline thin film semiconductors using sequential lateral solidification
11/17/2005US20050255639 Complementary thin film transistor circuit, electro-optical device, and electronic apparatus
11/17/2005US20050255638 Trench corner effect bidirectional flash memory cell
11/17/2005US20050255626 Method of manufacturing semiconductor device
11/17/2005US20050255625 Image sensor with deep well region and method of fabricating the image sensor
11/17/2005US20050255622 Substrate, liquid crystal display having the substrate, and method for producing substrate
11/17/2005US20050255621 Thin film transistor device and method of manufacturing the same
11/17/2005US20050255616 Active matrix display devices, and their manufacture
11/17/2005US20050254395 Laser irradiation method and laser irradiation apparatus
11/17/2005US20050254303 Nand flash memory device
11/17/2005US20050254298 Channel erase type nonvolatile semiconductor memory device and electronic card and electronic apparatus using the device
11/17/2005US20050254289 Magnetic memory device and method of manufacturing the same
11/17/2005US20050254189 ESD protection circuit with low parasitic capacitance
11/17/2005US20050253984 Liquid crystal display and method for manufacturing the same
11/17/2005US20050253979 Liquid crystal display and thin film transistor array panel therefor
11/17/2005US20050253978 Thin film transistor array substrate and fabricating method thereof
11/17/2005US20050253275 Flip chip package and process of forming the same
11/17/2005US20050253274 Semiconductor device of chip-on-chip structure, assembling process therefor, and semiconductor chip to be bonded to solid surface
11/17/2005US20050253273 Method for integrating pre-fabricated chip structures into functional electronic systems
11/17/2005US20050253248 Multilayer wiring substrate and method of manufacturing multilayer wiring substrate
11/17/2005US20050253235 Semiconductor chip and circuit board, manufacturing method of same, and electronic equipment
11/17/2005US20050253230 Large die package structures and fabrication method therefor
11/17/2005US20050253222 Semiconductor devices on misoriented substrates
11/17/2005US20050253220 Localized synthesis and self-assembly of nanostructures
11/17/2005US20050253219 Semiconductor device and method of manufacturing the same
11/17/2005US20050253218 High voltage gate driver integrated circuit including high voltage junction capacitor and high voltage LDMOS transistor
11/17/2005US20050253217 Non-uniformly doped high voltage drain-extended transistor and method of manufacture thereof
11/17/2005US20050253209 Anchors for microelectromechanical systems having an SOI substrate, and method of fabricating same
11/17/2005US20050253205 Semiconductor device and method for fabricating the same
11/17/2005US20050253204 Method of forming silicided gate structure
11/17/2005US20050253203 Apparatus and method for multiple-gate semiconductor device with angled sidewalls
11/17/2005US20050253202 Semiconductor device and method of fabricating the same
11/17/2005US20050253201 Semiconductor device and method of manufacture thereof
11/17/2005US20050253200 Method for improving transistor performance through reducing the salicide interface resistance
11/17/2005US20050253198 NAND flash memory device and method of forming a well of a NAND flash memory device
11/17/2005US20050253197 Semiconductor device and method of manufacturing the same
11/17/2005US20050253196 Semiconductor device and manufacturing method thereof
11/17/2005US20050253195 Semiconductor device and image display device
11/17/2005US20050253193 Method of fabricating a necked finfet device
11/17/2005US20050253192 Stepped tip junction with spacer layer
11/17/2005US20050253191 Robust DEMOS transistors and method for making the same
11/17/2005US20050253190 Semiconductor device
11/17/2005US20050253189 Silicon-oxide-nitride-oxide-silicon (SONOS) memory devices having recessed channels and methods of fabricating the same
11/17/2005US20050253188 Semiconductor memory device and method of manufacturing the same
11/17/2005US20050253187 Semiconductor device
11/17/2005US20050253186 Trench corner effect bidirectional flash memory cell
11/17/2005US20050253185 Trench corner effect bidirectional flash memory cell
11/17/2005US20050253183 Non-volatile semiconductor memory device and method of fabricating the same
11/17/2005US20050253182 Non-volatile memory, non-volatile memory array and manufacturing method thereof
11/17/2005US20050253181 Semiconductor device
11/17/2005US20050253180 DRAM cell arrangement with vertical MOS transistors
11/17/2005US20050253179 Capacitor and method of manufacturing the same
11/17/2005US20050253177 Two-transistor pixel with buried reset channel and method of formation
11/17/2005US20050253175 MOS-transistor on SOI substrate with source via
11/17/2005US20050253174 MOS transistor and a semiconductor integrated circuit apparatus having the same
11/17/2005US20050253172 Charge carrier flow apparatus and methods
11/17/2005US20050253170 Dielectric isolation type semiconductor device
11/17/2005US20050253169 Semiconductor device
11/17/2005US20050253168 Wide bandgap transistors with multiple field plates
11/17/2005US20050253167 Wide bandgap field effect transistors with source connected field plates
11/17/2005US20050253166 Thermal anneal process for strained-Si devices
11/17/2005US20050253165 Adaptive gate drive for switching devices of inverter
11/17/2005US20050253164 Tunnel junctions for long-wavelength vcsels
11/17/2005US20050253161 Semiconductor light emitting device on insulating substrate and its manufacture method
11/17/2005US20050253159 Semiconductor (LED) chip attachment
11/17/2005US20050253156 Semiconductor light-emitting device and fabrication method of the same
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