| Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143) |
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| 11/29/2005 | US6969894 Variable threshold semiconductor device and method of operating same |
| 11/29/2005 | US6969891 Device providing protection against electrostatic discharges for microelectronic components on a SOI-type substrate |
| 11/29/2005 | US6969890 Structure of thin film transistor |
| 11/29/2005 | US6969889 Wire structure, a thin film transistor substrate of using the wire structure and a method of manufacturing the same |
| 11/29/2005 | US6969888 Planarized and silicided trench contact |
| 11/29/2005 | US6969887 Semiconductor device |
| 11/29/2005 | US6969885 Non-volatile semiconductor memory device with first and second nitride insulators |
| 11/29/2005 | US6969884 Semiconductor device and method of manufacturing the same |
| 11/29/2005 | US6969883 Non-volatile memory having a reference transistor |
| 11/29/2005 | US6969882 Interconnect line selectively isolated from an underlying contact plug |
| 11/29/2005 | US6969881 Partial vertical memory cell and method of fabricating the same |
| 11/29/2005 | US6969878 Surround-gate semiconductor device encapsulated in an insulating medium |
| 11/29/2005 | US6969876 Semiconductor device including p-channel type transistor, and production method for manufacturing such semiconductor device |
| 11/29/2005 | US6969875 Buried channel strained silicon FET using a supply layer created through ion implantation |
| 11/29/2005 | US6969872 Thin film transistor array panel for liquid crystal display |
| 11/29/2005 | US6969871 Thin film semiconductor device |
| 11/29/2005 | US6969870 Semiconductor device having an amorphous silicon-germanium gate electrode |
| 11/29/2005 | US6969868 Method of storing a data bit including melting and cooling a volume of alloy therein |
| 11/29/2005 | US6969867 Field effect chalcogenide devices |
| 11/29/2005 | US6969839 Backthinned CMOS sensor with low fixed pattern noise |
| 11/29/2005 | US6969678 Multi-silicide in integrated circuit technology |
| 11/29/2005 | US6969663 Method of manufacturing a memory integrated circuit device |
| 11/29/2005 | US6969662 Semiconductor device |
| 11/29/2005 | US6969661 Method for forming a localized region of a material difficult to etch |
| 11/29/2005 | US6969659 FinFETs (Fin Field Effect Transistors) |
| 11/29/2005 | US6969658 Methods providing oxide layers having reduced thicknesses at central portions thereof |
| 11/29/2005 | US6969657 Superjunction device and method of manufacture therefor |
| 11/29/2005 | US6969656 Method and circuit for multiplying signals with a transistor having more than one independent gate structure |
| 11/29/2005 | US6969655 Method of fabricating a semiconductor device that includes removing a residual conducting layer from a sidewall spacer corresponding to a gate electrode of a flash memory |
| 11/29/2005 | US6969650 Methods of forming gate structures in nonvolatile memory devices having curved side walls formed using oxygen pathways |
| 11/29/2005 | US6969646 Method of activating polysilicon gate structure dopants after offset spacer deposition |
| 11/29/2005 | US6969645 Method of manufacturing a semiconductor device comprising a non-volatile memory with memory cells |
| 11/29/2005 | US6969644 Versatile system for triple-gated transistors with engineered corners |
| 11/29/2005 | US6969643 Thin film transistor array panel used for a liquid crystal display and a manufacturing method thereof |
| 11/29/2005 | US6969634 Semiconductor layers with roughness patterning |
| 11/29/2005 | US6969629 Method for manufacturing micro-structural unit |
| 11/29/2005 | US6969626 Method for forming LED by a substrate removal process |
| 11/29/2005 | US6969618 SOI device having increased reliability and reduced free floating body effects |
| 11/29/2005 | US6969617 Method for manufacturing NAND type nonvolatile ferroelectric memory cell |
| 11/29/2005 | US6969580 Method of manufacturing semiconductor device |
| 11/29/2005 | US6969425 Methods for reducing the curvature in boron-doped silicon micromachined structures |
| 11/29/2005 | CA2438581C Organic light emitting diode display having shield electrodes |
| 11/24/2005 | WO2005112134A2 High current mos device with avalanche protection and method of operation |
| 11/24/2005 | WO2005112129A1 Semiconductor device and process for fabricating same, and process for producing semiconductor substrate |
| 11/24/2005 | WO2005112128A2 Trench mosfet including buried source electrode and method of fabricating the same |
| 11/24/2005 | WO2005112127A1 SEMICONDUCTOR DEVICE BASED ON Si-Ge WITH HIGH STRESS LINER FOR ENHANCED CHANNEL CARRIER MOBILITY |
| 11/24/2005 | WO2005112126A1 Electromechanical nanotube tunneling device comprising source, drain and gate |
| 11/24/2005 | WO2005112125A2 Misalignment-tolerant multiplexing/demultiplexing architectures |
| 11/24/2005 | WO2005112124A2 Isolation trench |
| 11/24/2005 | WO2005112123A2 Fabrication of nonpolar indium gallium nitride thin films, heterostructures and devices by metalorganic chemical vapor deposition |
| 11/24/2005 | WO2005112122A2 Nanowire varactor diode and methods of making same |
| 11/24/2005 | WO2005112119A1 Nrom device |
| 11/24/2005 | WO2005112104A2 Cmos transistor using high stress liner layer |
| 11/24/2005 | WO2005112099A2 Method of semiconductor fabrication in corporating disposable spacer into elevated source/drain processing |
| 11/24/2005 | WO2005112097A1 Semiconductor device and method for fabricating the same, semiconductor substrate and method for producing the same |
| 11/24/2005 | WO2005112094A2 Method for making a semiconductor structure using silicon germanium |
| 11/24/2005 | WO2005112089A1 Semiconductor device and method for manufacturing same |
| 11/24/2005 | WO2005112088A1 Semiconductor device manufacturing method and manufacturing apparatus |
| 11/24/2005 | WO2005112087A1 Implanted counted dopant ions |
| 11/24/2005 | WO2005112086A1 Manganese doped magnetic semiconductors |
| 11/24/2005 | WO2005112085A1 Copper doped magnetic semiconductors |
| 11/24/2005 | WO2005112045A1 Dielectric material |
| 11/24/2005 | WO2005111817A2 Semiconductor device and method of forming the same |
| 11/24/2005 | WO2005110912A1 Tap unit for a beverage dispenser |
| 11/24/2005 | WO2005094515A3 Structure and method for contact pads having an overcoat-protected bondable metal plug over copper-metallized integrated circuits |
| 11/24/2005 | WO2005093813A8 Method for manufacturing thin film transistor |
| 11/24/2005 | WO2005091370A8 Method for manufacturing integrated circuit |
| 11/24/2005 | WO2005088704A8 Semiconductor device |
| 11/24/2005 | WO2005081798A3 Twin eeprom memory transistors with subsurface stepped floating gates |
| 11/24/2005 | WO2005081308A3 Protective diode for protecting semiconductor switching circuits from electrostatic discharges |
| 11/24/2005 | WO2005077549A8 Thin film transistor and display device, and method for manufacturing thereof |
| 11/24/2005 | WO2005076366A3 Soi semi-conductor component with increased dielectric strength |
| 11/24/2005 | WO2005071757A3 Semiconductor component comprising a temporary field stopping area, and method for the production thereof |
| 11/24/2005 | WO2005062345A3 A method of forming a silicon oxynitride layer |
| 11/24/2005 | WO2005010994A1 Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication |
| 11/24/2005 | WO2005001840A3 Mirror image non-volatile memory cell transistor pairs with single poly layer |
| 11/24/2005 | US20050262293 SRAM core cell for light-emitting display |
| 11/24/2005 | US20050260862 Semiconductor device and method for producing the same |
| 11/24/2005 | US20050260859 Method for patterning a semiconductor region |
| 11/24/2005 | US20050260858 Versatile system for limiting electric field degradation of semiconductor structures |
| 11/24/2005 | US20050260852 Bimetal layer manufacturing method |
| 11/24/2005 | US20050260832 Polycrystalline SiGe junctions for advanced devices |
| 11/24/2005 | US20050260826 Yield improvement in silicon-germanium epitaxial growth |
| 11/24/2005 | US20050260825 Shallow trench isolation structure for strained Si on SiGe |
| 11/24/2005 | US20050260821 Method of fabricating self-aligned silicon carbide semiconductor devices |
| 11/24/2005 | US20050260820 Method of manufacturing a semiconductor integrated circuit device having a trench |
| 11/24/2005 | US20050260819 Reduced dielectric constant spacer materials integration for high speed logic gates |
| 11/24/2005 | US20050260818 Semiconductor device and method for fabricating the same |
| 11/24/2005 | US20050260817 Semiconductor device and method for manufacturing the same |
| 11/24/2005 | US20050260816 Method for removing a semiconductor layer |
| 11/24/2005 | US20050260815 Step gate electrode structures for field-effect transistors and methods for fabricating the same |
| 11/24/2005 | US20050260814 Nonvolatile memory cells having high control gate coupling ratios using grooved floating gates and methods of forming same |
| 11/24/2005 | US20050260809 Semiconductor device manufacturing method |
| 11/24/2005 | US20050260808 MOSFET structure with high mechanical stress in the channel |
| 11/24/2005 | US20050260807 Method for making a semiconductor structure using silicon germanium |
| 11/24/2005 | US20050260805 Semiconductor device and method for producing the same |
| 11/24/2005 | US20050260804 Semiconductor device and method of fabricating the same |
| 11/24/2005 | US20050260803 Thin film field effect transistor with gate dielectric made of organic material and method for fabricating the same |
| 11/24/2005 | US20050260801 High performance FET with elevated source/drain region |
| 11/24/2005 | US20050260800 Method of manufacturing a semiconductor device |