Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
12/2007
12/25/2007US7312099 Organic electroluminescent device and fabricating method thereof
12/25/2007US7311947 Laser assisted material deposition
12/25/2007US7311776 Localized synthesis and self-assembly of nanostructures
12/25/2007US7311008 Semiconductor structure comprising a stress sensitive element and method of measuring a stress in a semiconductor structure
12/21/2007WO2007146872A2 Scalable process and structure for jfet for small and decreasing line widths
12/21/2007WO2007146250A2 Naphthalene-based semiconductor materials and methods of preparing and use thereof
12/21/2007WO2007146077A2 Multi-layer chalcogenide devices
12/21/2007WO2007146062A2 Led light and heat sink apparatus
12/21/2007WO2007145790A2 An integrated circuit device having barrier and method of fabricating the same
12/21/2007WO2007145778A2 Mems device and method of fabricating the same
12/21/2007WO2007145293A1 Novel fluorine-containing aromatic compounds, organic semiconductor materials, and organic this film devices
12/21/2007WO2007145279A1 Normally-off field effect transistor using iii nitride semiconductor and method for manufacturing such transistor
12/21/2007WO2007145031A1 Method for driving semiconductor device, and semiconductor device
12/21/2007WO2007144807A2 Double gate transistor and method of manufacturing same
12/21/2007WO2007144560A1 Electrical switching device and method of embedding catalytic material in a diamond substrate
12/21/2007WO2007144416A1 Mos-power transistors with edge termination with small area requirement
12/21/2007WO2007143852A1 Matrix electronic devices using opaque substrates and fabrication method therefor
12/21/2007WO2007124445A3 Organosilane-stabilized nanoparticles of si or ge in an oxide matrix
12/21/2007WO2007122083B1 Dynamic memory cell structures
12/21/2007WO2007117775A3 Semiconductor fabrication process using etch stop layer to optimize formation of source/drain stressor
12/21/2007WO2007092655A3 Method to selectively form regions having differing properties and structure
12/21/2007WO2007019487A3 Method and system for fabricating thin devices
12/21/2007WO2006076082A3 Method and apparatus for providing structural support for interconnect pad while allowing signal conductance
12/21/2007WO2006068672A3 Semiconductor die positioning system and a method of bonding a semiconductor die to a substrate
12/21/2007WO2006019761A3 Mems device and interposer and method for integrating mems device and interposer
12/21/2007WO2005053373A3 Chip scale package and method of assembling the same
12/21/2007CA2682360A1 Matrix electronic devices using opaque substrates and fabrication method therefor
12/21/2007CA2653626A1 Circuit configurations having four terminal jfet devices
12/21/2007CA2652889A1 Scalable process and structure for jfet for small and decreasing line widths
12/20/2007US20070293056 Surface Modification Method for Solid Sample, Impurity Activation Method, and Method for Manufacturing Semiconductor Device
12/20/2007US20070293031 SPLIT POLY-SiGe/POLY-Si ALLOY GATE STACK
12/20/2007US20070293030 Semiconductor device having silicide thin film and method of forming the same
12/20/2007US20070293024 Method of crystallizing amorphous silicon and device fabricated using the same
12/20/2007US20070293018 Method of fabricating semiconductor device with shallow trench isolation
12/20/2007US20070293015 III-Nitride device and method with variable epitaxial growth direction
12/20/2007US20070293011 Field effect transistor device with channel fin structure and method of fabricating the same
12/20/2007US20070293009 Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same
12/20/2007US20070293003 Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same
12/20/2007US20070293002 Method of fabricating a high-voltage transistor with an extended drain structure
12/20/2007US20070292995 Reverse blocking semiconductor device and a method for manufacturing the same
12/20/2007US20070290774 Phase change control devices and circuits for guiding electromagnetic waves employing phase change control devices
12/20/2007US20070290375 Active device array mother substrate
12/20/2007US20070290300 Semiconductor device and method for manufacturing same
12/20/2007US20070290298 Semiconductor filter structure and method of manufacture
12/20/2007US20070290297 Filter having integrated floating capacitor and transient voltage suppression structure and method of manufacture
12/20/2007US20070290296 Fuse Structures and Methods of Forming the Same
12/20/2007US20070290294 Trench insulation structures and methods
12/20/2007US20070290293 Liner for shallow trench isolation
12/20/2007US20070290292 Use of teos oxides in integrated circuit fabrication processes
12/20/2007US20070290291 High voltage devices
12/20/2007US20070290290 ESD Device Layout for Effectively Reducing Internal Circuit Area and Avoiding ESD and Breakdown Damage and Effectively Protecting High Voltage IC
12/20/2007US20070290281 Activation device
12/20/2007US20070290280 Semiconductor device having silicide thin film and method of forming the same
12/20/2007US20070290279 Semiconductor device including groove pattern around effective chip and method for fabricating the same
12/20/2007US20070290278 Semiconductor device and process for reducing damaging breakdown in gate dielectrics
12/20/2007US20070290277 Process for Fabricating a Strained Channel MOSFET Device
12/20/2007US20070290276 Voltage-clipping device with high breakdown voltage
12/20/2007US20070290275 Semiconductor integrated circuit device having deposited layer for gate insulation
12/20/2007US20070290274 Nonvolatile semiconductor memory device including memory cells formed to have double-layered gate electrodes
12/20/2007US20070290273 Operating method of non-volatile memory device
12/20/2007US20070290272 Integrated thin-film resistor with direct contact
12/20/2007US20070290271 Semiconductor device and method of manufacturing the same
12/20/2007US20070290270 Performance and Area Scalable Cell Architecture Technology
12/20/2007US20070290269 Device with gates configured in loop structures
12/20/2007US20070290268 Method of fabricating semiconductor device
12/20/2007US20070290267 Semiconductor device and method of manufacturing the same
12/20/2007US20070290266 Turn-on-efficient bipolar structures for on-chip esd protection
12/20/2007US20070290265 Method of Fabricating Heterojunction Photodiodes with CMOS
12/20/2007US20070290264 Semiconductor device and a method of manufacturing the same
12/20/2007US20070290261 Self-driven ldmos transistor
12/20/2007US20070290260 Trench Type Mosfet And Method Of Fabricating The Same
12/20/2007US20070290259 Method for manufacturing a semiconductor device including an impurity-doped silicon film
12/20/2007US20070290257 Structure and method for forming a shielded gate trench fet with the shield and gate electrodes being connected together
12/20/2007US20070290256 A 2-Bit Assisted Charge Memory Device and Method for Making the Same
12/20/2007US20070290255 Source lines for NAND memory devices
12/20/2007US20070290254 Exposure system, semiconductor device, and method for fabricating the semiconductor device
12/20/2007US20070290253 Nonvolatile semiconductor memory device and manufacturing method thereof
12/20/2007US20070290252 Programmable memory device, integrated circuit including the programmable memory device, and method of fabricating same
12/20/2007US20070290251 A NAND Memory Device with Inversion Bit Lines and Methods for Making the Same
12/20/2007US20070290250 Multiple dielectric finfet structure and method
12/20/2007US20070290249 Integrated Circuit Including a Memory Cell Array
12/20/2007US20070290248 Manufacturing method for an integrated semiconductor structure and corresponding semiconductor structure
12/20/2007US20070290246 Image Sensor and Image Sensor Integrated Type Active Matrix Type Display Device
12/20/2007US20070290239 Method of fabricating semiconductor device
12/20/2007US20070290238 Field effect transistor and solid state image pickup device
12/20/2007US20070290237 Insulated gate bipolar transistor and method for manufacturing same
12/20/2007US20070290236 Semiconductor device and method of fabricating the same
12/20/2007US20070290231 Method of manufacturing a bipolar transistor and bipolar transistor thereof
12/20/2007US20070290230 Nitride Semiconductor Device And Production Method Thereof
12/20/2007US20070290227 Dual-gate transistor and pixel structure using the same
12/20/2007US20070290226 Method for producing a semiconductor arrangement, semiconductor arrangement and its application
12/20/2007US20070290223 Semiconductor memory device and method of manufacturing the same
12/20/2007US20070290220 Package for a light emitting diode and a process for fabricating the same
12/20/2007US20070290219 Light emitting device and method of manufacturing the same
12/20/2007US20070290218 Packaged light emitting devices
12/20/2007US20070290214 Light emitting diode structure
12/20/2007US20070290211 Bipolar Semiconductor Device and Process for Producing the Same
12/20/2007US20070290210 Semiconductor device and method of fabricating a ltps film
12/20/2007US20070290209 Display device
12/20/2007US20070290208 Semiconductor device and manufacturing method thereof