| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 02/28/2013 | US20130050347 Fluid ejection device and methods of fabrication |
| 02/28/2013 | US20130050228 Glass as a substrate material and a final package for mems and ic devices |
| 02/28/2013 | US20130050166 Silicide gap thin film transistor |
| 02/28/2013 | US20130050055 Phased array antenna module and method of making same |
| 02/28/2013 | US20130049924 Resistor and manufacturing method thereof |
| 02/28/2013 | US20130049916 Semiconductor structure with galvanically-isolated signal and power paths |
| 02/28/2013 | US20130049852 Mofset mismatch characterization circuit |
| 02/28/2013 | US20130049846 Circuit Structure with Resistors or Capacitors |
| 02/28/2013 | US20130049814 Parallel connection methods for high performance transistors |
| 02/28/2013 | US20130049788 Mofset mismatch characterization circuit |
| 02/28/2013 | US20130049781 Semiconductor Devices with Self-heating Structures, Methods of Manufacture Thereof, and Testing Methods |
| 02/28/2013 | US20130049746 Semiconductor Chip Package and Method |
| 02/28/2013 | US20130049646 Energy conversion device and methods of manufacturing and operating the same |
| 02/28/2013 | US20130049528 Capacitive transducer and methods of manufacturing and operating the same |
| 02/28/2013 | US20130049234 Substrate Dicing |
| 02/28/2013 | US20130049233 Chip package and method for making same |
| 02/28/2013 | US20130049232 Component assembly using a temporary attach material |
| 02/28/2013 | US20130049231 Semiconductor device and method for making the same |
| 02/28/2013 | US20130049230 Stacking method and stacking carrier |
| 02/28/2013 | US20130049229 Semiconductor chip device with solder diffusion protection |
| 02/28/2013 | US20130049227 Package stacks and method of manufacturing the same |
| 02/28/2013 | US20130049222 Semiconductor device and method of manufacturing the same |
| 02/28/2013 | US20130049219 Semiconductor Device and Method for Forming the Same |
| 02/28/2013 | US20130049218 Semiconductor device packaging having pre-encapsulation through via formation |
| 02/28/2013 | US20130049217 Semiconductor device packaging having pre-encapsulation through via formation using drop-in signal conduits |
| 02/28/2013 | US20130049216 Die-to-Die Gap Control for Semiconductor Structure and Method |
| 02/28/2013 | US20130049215 Integrated circuit including front side and back side electrical interconnects |
| 02/28/2013 | US20130049214 Method of processing at least one die and die arrangement |
| 02/28/2013 | US20130049213 Configuration of connections in a 3d stack of integrated circuits |
| 02/28/2013 | US20130049211 Semiconductor device and method of manufacturing the same |
| 02/28/2013 | US20130049209 Semiconductor device with damascene bit line and method for manufacturing the same |
| 02/28/2013 | US20130049208 Integrated circuit packaging system with redistribution layer and method of manufacture thereof |
| 02/28/2013 | US20130049207 Multiple step anneal method and semiconductor formed by multiple step anneal |
| 02/28/2013 | US20130049205 Semiconductor Device and Method of Manufacturing a Semiconductor Device Including Grinding Steps |
| 02/28/2013 | US20130049203 Semiconductor Device with Buried Electrode |
| 02/28/2013 | US20130049201 Power Module and Manufacturing Method Thereof |
| 02/28/2013 | US20130049199 Silicidation of device contacts using pre-amorphization implant of semiconductor substrate |
| 02/28/2013 | US20130049198 Semiconductor package structure and manufacturing method thereof |
| 02/28/2013 | US20130049197 Semiconductor package structure and manufacturing method thereof |
| 02/28/2013 | US20130049195 Three-Dimensional Integrated Circuit (3DIC) Formation Process |
| 02/28/2013 | US20130049194 Self-aligned protection layer for copper post structure |
| 02/28/2013 | US20130049193 Formation of through-silicon via (tsv) in silicon substrate |
| 02/28/2013 | US20130049192 Stacked chip package and fabrication method thereof |
| 02/28/2013 | US20130049190 Methods of fabricating semiconductor chip solder structures |
| 02/28/2013 | US20130049188 Semiconductor Device and Method of Forming TIM Within Recesses of MUF Material |
| 02/28/2013 | US20130049187 Resin-diamagnetic material composite structure, method for producing the same, and semiconductor device using the same |
| 02/28/2013 | US20130049186 Semiconductor device and method of manufacture thereof |
| 02/28/2013 | US20130049185 Semiconductor package and fabrication method thereof |
| 02/28/2013 | US20130049184 Electric device and production method therefor |
| 02/28/2013 | US20130049183 Power device and method of packaging same |
| 02/28/2013 | US20130049182 Semiconductor device packaging having pre-encapsulation through via formation using lead frames with attached signal conduits |
| 02/28/2013 | US20130049181 Lead frame having a flag with in-plane and out-of-plane mold locking features |
| 02/28/2013 | US20130049180 Qfn device and lead frame therefor |
| 02/28/2013 | US20130049179 Low cost hybrid high density package |
| 02/28/2013 | US20130049178 Wafer structure for electronic integrated circuit manufacturing |
| 02/28/2013 | US20130049177 Wafer structure for electronic integrated circuit manufacturing |
| 02/28/2013 | US20130049175 Wafer structure for electronic integrated circuit manufacturing |
| 02/28/2013 | US20130049174 Wafer structure for electronic integrated circuit manufacturing |
| 02/28/2013 | US20130049173 Wafer structure for electronic integrated circuit manufacturing |
| 02/28/2013 | US20130049172 Insulating region for a semiconductor substrate |
| 02/28/2013 | US20130049169 Bipolar junction transistor and method of manufacturing the same |
| 02/28/2013 | US20130049168 Resistor and manufacturing method thereof |
| 02/28/2013 | US20130049165 Fuse |
| 02/28/2013 | US20130049164 Methods of Forming an Anode and a Cathode of a Substrate Diode by Performing Angled Ion Implantation Processes |
| 02/28/2013 | US20130049163 Insulation wall between transistors on soi |
| 02/28/2013 | US20130049162 Semiconductor device and manufacturing method thereof |
| 02/28/2013 | US20130049161 Nitride shallow trench isolation (sti) structures and methods for forming the same |
| 02/28/2013 | US20130049158 Formation of metal nanospheres and microspheres |
| 02/28/2013 | US20130049154 Device and method for individual finger isolation in an optoelectronic device |
| 02/28/2013 | US20130049144 Magnetoresistive random access memory (mram) device and fabrication methods thereof |
| 02/28/2013 | US20130049143 Release activated thin film getter |
| 02/28/2013 | US20130049142 Transistor with reduced parasitic capacitance |
| 02/28/2013 | US20130049141 Metal gate structure and fabrication method thereof |
| 02/28/2013 | US20130049140 Variation Resistant Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) |
| 02/28/2013 | US20130049138 Semiconductor device and method for manufacturing the same |
| 02/28/2013 | US20130049136 Combined planar fet and fin-fet devices and methods |
| 02/28/2013 | US20130049134 Semiconductor device and method of making same |
| 02/28/2013 | US20130049132 Parasitic capacitance reduction in mosfet by airgap ild |
| 02/28/2013 | US20130049131 Semiconductor integrated circuit device |
| 02/28/2013 | US20130049129 Semiconductor device and manufacturing method thereof |
| 02/28/2013 | US20130049128 Semiconductor Device with Dual Metal Silicide Regions and Methods of Making Same |
| 02/28/2013 | US20130049127 Controlling the Device Performance by Forming a Stressed Backside Dielectric Layer |
| 02/28/2013 | US20130049126 Methods of Forming a Semiconductor Device with Recessed Source/Drain Regions, and a Semiconductor Device Comprising Same |
| 02/28/2013 | US20130049125 Semiconductor device structure and method for manufacturing the same |
| 02/28/2013 | US20130049124 Mosfet integrated circuit with improved silicide thickness uniformity and methods for its manufacture |
| 02/28/2013 | US20130049123 Semiconductor Device with DRAM Word Lines and Gate Electrodes in Non-Memory Regions of the Device Comprised of a Metal, and Methods of Making Same |
| 02/28/2013 | US20130049122 Semiconductor device and method of manufacturing the same |
| 02/28/2013 | US20130049121 Threshold Voltage Adjustment in a Fin Transistor by Corner Implantation |
| 02/28/2013 | US20130049120 Semiconductor device structures including vertical transistor devices, arrays of vertical transistor devices, and methods of fabrication |
| 02/28/2013 | US20130049119 Multi-working voltages cmos device with single gate oxide layer thickness and manufacturing method thereof |
| 02/28/2013 | US20130049118 Thin-film transistor and method of manufacturing the same, and electronic unit |
| 02/28/2013 | US20130049117 Semiconductor device and method for manufacturing the same |
| 02/28/2013 | US20130049116 Semiconductor device and method for manufacturing the same |
| 02/28/2013 | US20130049115 Mosfet including asymmetric source and drain regions |
| 02/28/2013 | US20130049114 High voltage metal-oxide-semiconductor transistor device and method of fabricating the same |
| 02/28/2013 | US20130049113 U-shape resurf mosfet devices and associated methods of manufacturing |
| 02/28/2013 | US20130049110 Vertical Transistor Devices, Memory Arrays, And Methods Of Forming Vertical Transistor Devices |
| 02/28/2013 | US20130049109 Metal Gate Structure |
| 02/28/2013 | US20130049108 Quasi-Vertical Power MOSFET and Methods of Forming the Same |
| 02/28/2013 | US20130049107 Trench semiconductor power device and fabrication method thereof |