Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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01/08/1992 | EP0464372A2 Method of producing and passivating of semiconductor devices |
01/08/1992 | EP0464232A1 Solder connector and process for making an electrical circuit with this solder connector |
01/08/1992 | EP0464224A1 Method of and material for forming thick filmy pattern |
01/08/1992 | EP0464196A1 Single transistor non-volatile electrically alterable semiconductor memory device with a re-crystallized floating gate |
01/08/1992 | EP0449821A4 Chemical vapor deposition reactor and method for use thereof |
01/08/1992 | EP0314712B1 Two-terminal semiconductor diode arrangement |
01/08/1992 | EP0174986B1 Process for forming and locating buried layers |
01/08/1992 | CN1057736A Semiconductor device and method for producing same |
01/08/1992 | CN1057735A Method of making semiconductor components as well as solar cell made therefrom |
01/08/1992 | CN1057719A Test device for electric circuits on boards |
01/07/1992 | US5079748 Dynamic random access memory with read-write signal of shortened duration |
01/07/1992 | US5079746 Semiconductor memory circuit |
01/07/1992 | US5079725 Chip identification method for use with scan design systems and scan testing techniques |
01/07/1992 | US5079717 Method and system for compaction-processing mask pattern data of a semiconductor integrated circuit device |
01/07/1992 | US5079686 Enhancement-mode zero-current switching converter |
01/07/1992 | US5079617 Multiple layer electrode structure for semiconductor device and method of manufacturing thereof |
01/07/1992 | US5079616 Semiconductor structure |
01/07/1992 | US5079615 Capacitor for a semiconductor |
01/07/1992 | US5079614 Gate array architecture with basic cell interleaved gate electrodes |
01/07/1992 | US5079613 Semiconductor device having different impurity concentration wells |
01/07/1992 | US5079612 Semiconductor integrated circuit device |
01/07/1992 | US5079611 Semiconductor integrated circuit device and process for fabricating the same |
01/07/1992 | US5079610 Structure and method of fabricating a trapping-mode |
01/07/1992 | US5079609 Semiconductor device having dielectric breakdown protection element and method of fabricating same |
01/07/1992 | US5079603 Semiconductor memory device |
01/07/1992 | US5079600 Metal plating paths on solid substrate |
01/07/1992 | US5079516 User-proof post-assembly offset voltage trim |
01/07/1992 | US5079493 Ultra-precise positioning system |
01/07/1992 | US5079441 Integrated circuit having an internal reference circuit to supply internal logic circuits with a reduced voltage |
01/07/1992 | US5079430 Ultraviolet radiation projector and optical image forming apparatus |
01/07/1992 | US5079192 Controlling heating |
01/07/1992 | US5079188 Applying dielectric, hardening by heat treatment, etching |
01/07/1992 | US5079187 Method for processing semiconductor materials |
01/07/1992 | US5079186 Production method, production instrument, and handling method of compound semiconductor quantum boxes, and light emitting devices using those quantum boxes |
01/07/1992 | US5079184 Organomagnesium compound as doping source |
01/07/1992 | US5079183 Separation segments |
01/07/1992 | US5079182 Hydrosilation |
01/07/1992 | US5079181 Process for producing semiconductor memory device |
01/07/1992 | US5079180 Method of fabricating a raised source/drain transistor |
01/07/1992 | US5079179 Process of making GaAs electrical circuit devices with Langmuir-Blodgett insulator layer |
01/07/1992 | US5079178 Process for etching a metal oxide coating and simultaneous deposition of a polymer film, application of this process to the production of a thin film transistor |
01/07/1992 | US5079177 Integrated circuits, high speed computers |
01/07/1992 | US5079176 Method of forming a high voltage junction in a dielectrically isolated island |
01/07/1992 | US5079175 Process for the manufacture of short circuits on the anode side of thyristors |
01/07/1992 | US5079130 Partially or fully recessed microlens fabrication |
01/07/1992 | US5078922 Liquid source bubbler |
01/07/1992 | US5078851 Cooling |
01/07/1992 | US5078833 Using composite gas |
01/07/1992 | US5078832 Making thin film hydrophilic; supplying water and treatment vapors while spinning |
01/07/1992 | US5078824 Semiconductor device manufacturing apparatus |
01/07/1992 | US5078802 Method of washing super precision devices, semiconductors, with enzymes |
01/07/1992 | US5078801 Post-polish cleaning of oxidized substrates by reverse colloidation |
01/07/1992 | US5078312 Wire bonding method |
01/07/1992 | CA1294066C Guard ring for a differentially pumped seal apparatus |
01/07/1992 | CA1294065C Apparatus for preselecting and maintaining a fixed gap between a workpiece and a vacuum seal apparatus in particle beam lithography systems |
01/07/1992 | CA1294064C Field effect transistor |
01/07/1992 | CA1294063C Thin film forming device |
01/07/1992 | CA1294062C Integrated circuit die with resistive substrate isolation of multiple circuits |
01/07/1992 | CA1294061C Process for fabricating self-aligned silicide lightly doped drain mos devices |
01/02/1992 | EP0463972A1 Method of making an electric contact on an active element of an MIS integrated circuit |
01/02/1992 | EP0463956A1 Method for making one stage of an integrated circuit |
01/02/1992 | EP0463870A1 Plasma treating method using hydrogen gas |
01/02/1992 | EP0463853A1 Vacuum chuck |
01/02/1992 | EP0463826A1 Sealing glass composition and electrically conductive formulation containing same |
01/02/1992 | EP0463817A2 Gain cell structure for DRAM and fabrication process thereof |
01/02/1992 | EP0463807A2 Method of making a semiconductor device using epitaxial growth of a semiconductor layer on a semiconductor substrate |
01/02/1992 | EP0463788A2 Method for tape automated bonding |
01/02/1992 | EP0463763A2 Semiconductor package and method with wraparound metallization |
01/02/1992 | EP0463758A1 Hollow chip package and method of manufacture |
01/02/1992 | EP0463746A2 Segmented routing architecture |
01/02/1992 | EP0463745A1 A vertical pnp transistor |
01/02/1992 | EP0463731A1 Electrode for semiconductor device and process for producing the same |
01/02/1992 | EP0463685A1 Method of manufacturing a semiconductor device and device for carrying out said method |
01/02/1992 | EP0463684A1 Test device for electric circuits on boards |
01/02/1992 | EP0463669A2 A method of manufacturing a semiconductor device |
01/02/1992 | EP0463633A1 Chemical-vapor-deposition apparatus and method for reducing particulate contamination in a chemical-vapor-deposition process |
01/02/1992 | EP0463623A2 Nonvolatile semiconductor memory circuit |
01/02/1992 | EP0463617A2 Semiconductor memory device |
01/02/1992 | EP0463587A1 Optical alignment detection apparatus |
01/02/1992 | EP0463580A2 Non-volatile semiconductor memory device |
01/02/1992 | EP0463559A2 Packaged semiconductor device and a manufacturing process therefor |
01/02/1992 | EP0463545A2 Substrate bias generator for semiconductor devices |
01/02/1992 | EP0463511A2 Split gate EPROM cell using polysilicon spacers |
01/02/1992 | EP0463510A2 High density stacked gate EPROM split cell with bit line reach-through and interruption immunity |
01/02/1992 | EP0463500A1 An apparatus for reducing, enlarging and projecting image information |
01/02/1992 | EP0463476A2 Self-aligned collector implant for bipolar transistors |
01/02/1992 | EP0463459A1 Method for fabricating a mesa transistor-trench capacitor memory cell structure |
01/02/1992 | EP0463458A1 Method and structure for interconnecting different polysilicon zones on semiconductor substrates for integrated circuits |
01/02/1992 | EP0463457A2 Methods and apparatus for precise alignment of objects |
01/02/1992 | EP0463423A1 Surface treating agent for aluminum line pattern substrate |
01/02/1992 | EP0463392A1 An apparatus having a vacuum chamber |
01/02/1992 | EP0463389A1 Structure and fabrication method for a double trench memory cell device |
01/02/1992 | EP0463378A2 An electrically-erasable, electrically-programmable read-only memory cell with a selectable threshold voltage and methods for its use |
01/02/1992 | EP0463373A2 Local interconnect using a material comprising tungsten |
01/02/1992 | EP0463372A2 Improved architecture and process for integrating DMD with control circuit substrates |
01/02/1992 | EP0463365A2 Triple level self-aligned metallurgy for semiconductor devices |
01/02/1992 | EP0463364A1 Tape automated bonding feeder |
01/02/1992 | EP0463362A2 Semiconductor device having metallic layers |
01/02/1992 | EP0463332A1 Manufacturing method of a multilayer gate electrode containing doped polysilicon and metal-silicide for a MOS-transistor |
01/02/1992 | EP0463331A2 An improved method for programming a non-volatile memory |