Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/1991
10/31/1991WO1991016148A1 Process for applying a composite insulative coating to a substrate
10/31/1991DE4113968A1 Mask structure for semiconductor component prodn. - has transparent support plate on which are periodically set given groups of component structures with phase shift structures
10/31/1991DE4110331A1 Semiconductor device with low leakage current - has ion injected buried impurity layer and getter layer
10/31/1991DE4040053A1 Superconductive IC prodn. - by selective oxygen diffusion into yttrium-barium-copper oxide substrate
10/31/1991DE4014008A1 Highly integrated circuit repair procedure
10/31/1991DE4013211A1 Ellipsometer Ellipsometer
10/31/1991CA2049946A1 X-ray imaging system
10/31/1991CA2034986A1 Patterning method for epitaxial lift-off processing
10/30/1991EP0454604A2 Laser ablation for plasma etching endpoint detection
10/30/1991EP0454579A2 Non-volatile semiconductor memory device having EEPROM cell, dummy cell and sense circuit for increasing reliability and enabling one-bit operation
10/30/1991EP0454555A1 Surface protection method against contamination from the immediate surroundings with the help of blowing elements
10/30/1991EP0454496A1 A wafer transfer sytem
10/30/1991EP0454440A1 Method of encapsulating a semiconductor device
10/30/1991EP0454384A2 Electrical via structure and method of forming the same
10/30/1991EP0454362A2 Backing pad and method of forming the backing pad by precision surface machining
10/30/1991EP0454352A1 Configurable logic array
10/30/1991EP0454335A2 Photoresist composition
10/30/1991EP0454319A1 N-channel clamp for ESD protection in self-aligned silicided CMOS process
10/30/1991EP0454314A2 Method and apparatus for applying a layer of fluid material on a semiconductor wafer
10/30/1991EP0454308A2 Process for fabricating low defect polysilicon
10/30/1991EP0454248A1 Integrated circuit comprising a multiple collector lateral transistor
10/30/1991EP0454237A1 Method of manufacturing a semiconductor device
10/30/1991EP0454236A1 Method of manufacturing a silicon body having an n-type top layer and an adjoining, more highly doped n-type base layer
10/30/1991EP0454200A1 Package for moulded carriers of integrated circuits
10/30/1991EP0454169A2 Photomask and method of treating the same
10/30/1991EP0454161A1 A sucked substrate detecting apparatus
10/30/1991EP0454150A1 Plastic moulded semiconductor device
10/30/1991EP0454134A2 Semiconductor device
10/30/1991EP0454111A1 Apparatus for manufacturing silicon single crystals
10/30/1991EP0454100A2 Method of forming silicon-based thin film and method of manufacturing thin film transistor using silicon-based thin film
10/30/1991EP0454055A2 Semiconductor device and method for manufacturing the same
10/30/1991EP0454054A2 Lamp annealing apparatus and lamp annealing method
10/30/1991EP0454053A2 Method of bending outer leads of a semiconductor device
10/30/1991EP0454051A2 Program element for use in redundancy technique for semiconductor memory device, and method of fabricating a semiconductor memory device having the same
10/30/1991EP0454020A2 Semiconductor memory device and method of manufacturing the same
10/30/1991EP0454005A2 Die attach adhesive composition
10/30/1991EP0453998A1 Semiconductor memory device having a bit line constituted by a semiconductor layer
10/30/1991EP0453997A1 Semiconductor memory device
10/30/1991EP0453961A2 SRAM using E/R memory cells that help decrease the software error rate
10/30/1991EP0453959A2 Semiconductor memory cell
10/30/1991EP0453953A2 Process for the production of printing plates or photoresist by imagewise exposure of a photopolymerisable registration material
10/30/1991EP0453867A1 Slit valve apparatus and method
10/30/1991EP0453858A1 Process for brazing metallized components to ceramic substrates
10/30/1991EP0453787A2 Semiconductor device having an insulating film
10/30/1991EP0453786A2 Convection transfer system
10/30/1991EP0453785A1 Method of making multilayer thin film circuit comprising integrated thin film resistors
10/30/1991EP0453780A2 Apparatus for contamination control in processing apparatus containing voltage driven electrode
10/30/1991EP0453764A1 Thermal joint
10/30/1991EP0453753A2 Method and apparatus for enhancing the depth of focus in projection lithography
10/30/1991EP0453737A1 Probe for a credit card with moulded semiconductor chip
10/30/1991EP0453679A1 Self cleaning flow control orifice
10/30/1991EP0453644A2 Method of making a hole in a semiconductor layer structure and its use in manufacturing contact holes
10/30/1991EP0453610A1 Process for obtaining resist structures
10/30/1991EP0453520A1 Quartz integrated trough/sump recirculating filtered high-purity chemical bath.
10/30/1991EP0263141B1 Method for depositing materials containing tellurium
10/30/1991EP0148238B1 High energy beam sensitive glasses
10/30/1991CN1014570B High-voltage silicon transistor with low-resistance film as substrate
10/29/1991US5062128 Timer control with selectable frequency divider
10/29/1991US5061990 Semiconductor device and the manufacture thereof
10/29/1991US5061988 Integrated circuit chip interconnect
10/29/1991US5061986 Self-aligned extended base contact for a bipolar transistor having reduced cell size and improved electrical characteristics
10/29/1991US5061984 Substrate and device comprising interconnection structures
10/29/1991US5061983 Semiconductor device having a metal silicide layer connecting two semiconductors
10/29/1991US5061982 VLSI triple-diffused polysilicon bipolar transistor structure
10/29/1991US5061980 Semiconductor integrated circuit device
10/29/1991US5061975 MOS type field effect transistor having LDD structure
10/29/1991US5061970 Energy band leveling modulation doped quantum well
10/29/1991US5061956 Optically imaging method and apparatus
10/29/1991US5061851 Inspection method and device for an aperture in a focused ion beam generating apparatus
10/29/1991US5061686 Superconducting power distribution structure for integrated circuits
10/29/1991US5061657 Method of making integrated circuit to package electrical connections after encapsulation with an organic polymer
10/29/1991US5061655 Method of producing SOI structures
10/29/1991US5061654 Masking to isolate active elements of memory device
10/29/1991US5061653 Trench isolation process
10/29/1991US5061652 Epitaxially growing three layers, each having a different dopant concentration, on a doped substrate, then isolating a device in the second layer using a dielectric
10/29/1991US5061651 Method of making dram cell with stacked capacitor
10/29/1991US5061650 Method for formation of a stacked capacitor
10/29/1991US5061649 Field effect transistor with lightly doped drain structure and method for manufacturing the same
10/29/1991US5061648 Method of fabricating a thin-film transistor
10/29/1991US5061647 Forming a conductive layer over a substrate having a gate dielectric, depositiong a work function adjusting material and etching to form an inverse-t-lightly-doped-drain
10/29/1991US5061646 Method for forming a self-aligned bipolar transistor
10/29/1991US5061645 Method of manufacturing a bipolar transistor
10/29/1991US5061644 Method for fabricating self-aligned semiconductor devices
10/29/1991US5061643 Method of doping a growing crystalline semiconductor film
10/29/1991US5061642 Method of manufacturing semiconductor on insulator
10/29/1991US5061574 Thick, low-stress films, and coated substrates formed therefrom
10/29/1991US5061552 Multi-layer ceramic substrate assembly and a process for manufacturing same
10/29/1991US5061356 Sputtering
10/29/1991US5061322 Decomposition of gaseous mixture of silicon compound, hydrocarbon, BF3, and hydrogen by glow discharge; boron-doped battery
10/29/1991US5061144 Resist process apparatus
10/29/1991US5060844 Interconnection structure and test method
10/29/1991US5060843 Process of forming bump on electrode of semiconductor chip and apparatus used therefor
10/29/1991US5060841 wire bonding method and apparatus and method of producing semiconductor device by use of wire bonding apparatus
10/29/1991US5060595 Via filling by selective laser chemical vapor deposition
10/29/1991US5060354 Heated plate rapid thermal processor
10/29/1991CA1291579C Method of isolating functional regions of an integrated circuit
10/29/1991CA1291577C Structure and process for fabricating complementary vertical transistormemory cell
10/29/1991CA1291567C Charged-coupled device with diode cut-off input
10/29/1991CA1291566C Semiconductor device
10/27/1991CA2041295A1 Die attach adhesive composition
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