| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
|---|
| 01/14/1992 | US5081519 Semiconductor device |
| 01/14/1992 | US5081517 Mixed technology integrated circuit comprising CMOS structures and efficient lateral bipolar transistors with a high early voltage and fabrication thereof |
| 01/14/1992 | US5081516 Self-aligned, planarized contacts for semiconductor devices |
| 01/14/1992 | US5081515 Semiconductor integrated circuit device |
| 01/14/1992 | US5081514 Protection circuit associated with input terminal of semiconductor device |
| 01/14/1992 | US5081513 Electronic device with recovery layer proximate to active layer |
| 01/14/1992 | US5081511 Heterojunction field effect transistor with monolayers in channel region |
| 01/14/1992 | US5081510 High-voltage semiconductor device having a rectifying barrier, and method of fabrication |
| 01/14/1992 | US5081426 Power amplifier having a standby circuit |
| 01/14/1992 | US5081421 In situ monitoring technique and apparatus for chemical/mechanical planarization endpoint detection |
| 01/14/1992 | US5081371 Integrated charge pump circuit with back bias voltage reduction |
| 01/14/1992 | US5081327 Sealing system for hermetic microchip packages |
| 01/14/1992 | US5081070 Superconducting circuit board and paste adopted therefor |
| 01/14/1992 | US5081068 Method of treating surface of substrate with ice particles and hydrogen peroxide |
| 01/14/1992 | US5081066 Reacting silicon layer with metal |
| 01/14/1992 | US5081065 Method of contacting silicide tracks |
| 01/14/1992 | US5081064 Method of forming electrical contact between interconnection layers located at different layer levels |
| 01/14/1992 | US5081062 Low temperature deposition |
| 01/14/1992 | US5081061 Manufacturing ultra-thin dielectrically isolated wafers |
| 01/14/1992 | US5081060 Masking, integrated circuits |
| 01/14/1992 | US5081059 Method of forming semiconductor integrated circuit using master slice approach |
| 01/14/1992 | US5081058 Semiconductors |
| 01/14/1992 | US5081057 Electrically alterable, nonvolatile, floating gate type memory device with reduced tunnelling area and fabrication thereof |
| 01/14/1992 | US5081056 Process for fabricating an eprom cell array organized in a tablecloth arrangement |
| 01/14/1992 | US5081054 Semiconductors |
| 01/14/1992 | US5081053 Method for forming a transistor having cubic boron nitride layer |
| 01/14/1992 | US5081052 Read only memory, semiconductors |
| 01/14/1992 | US5081050 Method of making a gate turn-off thyristor using a simultaneous diffusion of two different acceptor impurities |
| 01/14/1992 | US5081005 Method for reducing chemical interaction between copper features and photosensitive dielectric compositions |
| 01/14/1992 | US5081004 Method to produce a display screen with a matrix of transistors provided with an optical mask |
| 01/14/1992 | US5081002 Exposure to light |
| 01/14/1992 | US5081000 Photosensitive mixture |
| 01/14/1992 | US5080980 Ceramic package for semiconductor device |
| 01/14/1992 | US5080966 Copper and copper oxide coated with titanium compound |
| 01/14/1992 | US5080933 Selective deposition of polycrystalline silicon |
| 01/14/1992 | US5080929 Method and apparatus for through hole substrate printing |
| 01/14/1992 | US5080927 Titanium nitride from vapor deposition of cyclopentadienyl tit anium bound to a triazo group |
| 01/14/1992 | US5080763 Method of forming conductor lines of a semiconductor device |
| 01/14/1992 | US5080753 On single crystal silicon |
| 01/14/1992 | US5080730 Implantation profile control with surface sputtering |
| 01/14/1992 | US5080552 Apparatus for supplying resin tablets for use in encapsulating semiconductor device |
| 01/14/1992 | US5080549 Wafer handling system with Bernoulli pick-up |
| 01/14/1992 | US5080279 Method for tape automated bonding |
| 01/14/1992 | US5080276 Motor-driving circuit and wire-bonding apparatus |
| 01/14/1992 | US5080039 Processing apparatus |
| 01/14/1992 | US5079854 Method and apparatus for cleaning, coating and curing receptor substrates in an enclosed planetary array |
| 01/14/1992 | US5079835 Method of forming a carrierless surface mounted integrated circuit die |
| 01/14/1992 | CA2064748A1 Wet-tip die for efg crystal growth apparatus |
| 01/14/1992 | CA2046832A1 Compound semiconductor integrated circuit device |
| 01/14/1992 | CA1294377C Fabrication of customized integrated circuits |
| 01/14/1992 | CA1294181C Method for forming deposited film |
| 01/14/1992 | CA1294117C Method of making deactivatable tags |
| 01/13/1992 | WO1992001311A1 Process for electrochemical dissolution of semiconductors |
| 01/13/1992 | WO1992001234A1 Process and apparatus for determining concentration in semiconductors |
| 01/13/1992 | CA2087192A1 Process for electrochemical dissolution of semiconductors |
| 01/13/1992 | CA2087189A1 Process and apparatus for determining concentration in semiconductors |
| 01/10/1992 | WO1992016946A1 Semiconductor memory having nonvolatile semiconductor memory cell |
| 01/09/1992 | WO1992000609A1 Plasma etching indium tin oxide using a deposited oxide mask |
| 01/09/1992 | WO1992000608A1 Process for manufacturing pmos-transistors and pmos-transistors thus produced |
| 01/09/1992 | WO1992000606A1 Monolithically integrated semiconductor arrangement with a cover electrode |
| 01/09/1992 | WO1992000604A1 Metal bump for a thermal compression bond and method for making same |
| 01/09/1992 | WO1992000603A1 Semiconductor device and method of manufacturing the same |
| 01/09/1992 | WO1992000602A1 Process for structuring a single-crystal silicon substrate |
| 01/09/1992 | WO1992000601A1 Method of manufacturing semiconductor integrated circuit and equipment for the manufacture |
| 01/09/1992 | WO1991011094A3 Probe and inverting apparatus |
| 01/09/1992 | DE4121456A1 LDD transistor - with P=type pocket formed near gate and N-diffusion region |
| 01/09/1992 | DE4120248A1 SRAM with gate-array configured as dual port RAM - uses write-controlled local earths and complementary pairs in memory cells to avoid errors during write cycle |
| 01/09/1992 | DE4119920A1 Semiconductor device with increased life - by preventing grain boundary electromigration in connection layer |
| 01/09/1992 | DE4041902A1 Pyrolytic graphite-coated graphite clamp - used to hold starter wire for poly-silicon rod prod. |
| 01/09/1992 | DE4020076A1 Verfahren zur herstellung eines pmos-transistors sowie pmos-transistor Process for the preparation of a PMOS transistor and PMOS transistor |
| 01/08/1992 | EP0465264A2 Metal film forming method |
| 01/08/1992 | EP0465253A2 Integrated circuit and lead frame assembly |
| 01/08/1992 | EP0465229A1 Micropump and process for manufacturing a micropump |
| 01/08/1992 | EP0465227A2 Composite integrated circuit device |
| 01/08/1992 | EP0465199A1 Multiple lamination high density interconnect process and structure |
| 01/08/1992 | EP0465185A1 Vacuum processing method and apparatus |
| 01/08/1992 | EP0465151A2 Semiconductor device with Shottky junction |
| 01/08/1992 | EP0465069A1 Method for eliminating Na contamination in semiconductor manufacturing |
| 01/08/1992 | EP0465056A2 Method of making electrical contacts to gate structures in integrated circuits |
| 01/08/1992 | EP0465045A2 Method of field effect transistor fabrication for integrated circuits |
| 01/08/1992 | EP0465044A2 Method of etching for integrated circuits with planarized dielectric |
| 01/08/1992 | EP0465017A1 Integrated circuit test fixture and method |
| 01/08/1992 | EP0464866A2 Wafer and method of making same |
| 01/08/1992 | EP0464864A2 Apparatus for transporting a wafer |
| 01/08/1992 | EP0464843A2 Patterning method using an inorganic masking layer |
| 01/08/1992 | EP0464837A2 Method of manufacturing semiconductor substrate using semiconductor integrated circuit having dielectric separation structure |
| 01/08/1992 | EP0464834A1 Method of generating active semiconductor structures by means of starting structures which have a two-dimensional charge carrier layer parallel to the surface |
| 01/08/1992 | EP0464791A2 A method for burying low resistance material in a contact hole |
| 01/08/1992 | EP0464696A1 Two-step reactor chamber self cleaning process |
| 01/08/1992 | EP0464686A1 Dynamic semiconductor memory cell |
| 01/08/1992 | EP0464667A2 Power-on-clear signal generating circuit |
| 01/08/1992 | EP0464580A1 Dynamic random access memory cell with trench type storage capacitor |
| 01/08/1992 | EP0464579A2 Thin film field effect transistor array for use in active matrix liquid crystal display |
| 01/08/1992 | EP0464515A2 Method of manufacturing silicon nitride film |
| 01/08/1992 | EP0464514A2 Method of inspecting jointed portion |
| 01/08/1992 | EP0464453A1 MIS type capacitor having reduced change in capacitance when biased in forward and reverse directions |
| 01/08/1992 | EP0464452A2 Semiconductor integrated circuit |
| 01/08/1992 | EP0464450A1 System and method for inspection and alignment of semiconductor chips and conductive lead frames |
| 01/08/1992 | EP0464447A1 A SiC component and a method for making the same |
| 01/08/1992 | EP0464432A2 Asymmetrical virtual ground EPROM cell & fabrication method |