| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 08/30/1994 | US5342794 Method for forming laterally graded deposit-type emitter for bipolar transistor |
| 08/30/1994 | US5342793 Process for obtaining multi-layer metallization of the back of a semiconductor substrate |
| 08/30/1994 | US5342792 Forming a trench on substrate, oxide film on bottom of trench and sidewall and surface of substrate, forming selective deposition film formed by silicon or nitrogen dope; growing polysilicon, forming trench capacitor |
| 08/30/1994 | US5342739 Method of preparing a negative pattern utilizing photosensitive polymer composition containing quinonediazide compound and a poly(amido)imide precursor |
| 08/30/1994 | US5342734 Mixture of acid stable polymer, photoinitiator, carbonate ester of tetrabutyl alcohol and polyhydric phenol |
| 08/30/1994 | US5342652 Method of nucleating tungsten on titanium nitride by CVD without silane |
| 08/30/1994 | US5342582 UV emitters to irrodiate scrap and choppers to comminute |
| 08/30/1994 | US5342495 Structure for holding integrated circuit dies to be electroplated |
| 08/30/1994 | US5342481 Depositing discharge products on inclined sidewall surface for shaping, plasma etching |
| 08/30/1994 | US5342480 Isolating active regions that are buried in grooves formed in non-active regions |
| 08/30/1994 | US5342476 Placing a patterned resist layer over polycide layer on silicon wafer having exposed and covered areas; removing exposed silicide layer by non-isotropic etching; cooling with controlled flow of helium; removal of resist layer |
| 08/30/1994 | US5342471 Plasma processing apparatus including condensation preventing means |
| 08/30/1994 | US5342468 Depositing a thin film of inorganic metal or alloy over a easy releasing surface, pressing sheet form back to deform substrate, it causes thin film to cut and transferred at pressed part to required electronic part |
| 08/30/1994 | US5342460 Outer lead bonding apparatus |
| 08/30/1994 | US5342206 Socket for direct electrical connection to an integrated circuit chip |
| 08/30/1994 | US5341980 Method of fabricating electronic circuit device and apparatus for performing the same method |
| 08/30/1994 | US5341979 Method of bonding a semiconductor substrate to a support substrate and structure therefore |
| 08/30/1994 | US5341825 Liquid overflow tank combined with partition isolating two chambers |
| 08/30/1994 | US5341564 Method of fabricating integrated circuit module |
| 08/30/1994 | US5341563 Apparatus for manufacturing optical module |
| 08/30/1994 | CA1331730C Sublimation of silicon carbide to produce large, device quality single crystals of silicon carbide |
| 08/27/1994 | CA2090441A1 Field-effect transistor having a double pulse-doped structure |
| 08/25/1994 | DE4412238A1 Optical measuring arrangement for fast, contactless and non-destructive of characteristic semiconductor parameters |
| 08/25/1994 | DE4405815A1 Semiconductor device having an anode layer which has low-concentration regions formed by selective diffusion |
| 08/25/1994 | DE4405250A1 Halbleiter-Bauelement und Verfahren zu seiner Herstellung Semiconductor device and process for its preparation |
| 08/25/1994 | DE4345124A1 Doping method with small penetration depth for solid semiconductor bodies |
| 08/25/1994 | DE4314913C1 Method for producing a semiconductor component having a contact structure for vertical contact-making with other semiconductor components |
| 08/25/1994 | DE4314907C1 Method for producing semiconductor components making electrically conducting contact with one another vertically |
| 08/25/1994 | DE4305297A1 Texturing pickle for semiconductors, and use thereof |
| 08/25/1994 | DE4305296A1 Radiation-emitting diode with improved radiation power |
| 08/25/1994 | DE4304912A1 Method and device for the automatic production of chips |
| 08/24/1994 | EP0612154A1 Programmable logic circuit |
| 08/24/1994 | EP0612153A1 FPGA with distributed switch matrix |
| 08/24/1994 | EP0612151A2 Semiconductor device capable of reducing a clock skew in a plurality of wiring pattern blocks |
| 08/24/1994 | EP0612112A2 Chalcopyrite structure semiconductor film and process of producing the same |
| 08/24/1994 | EP0612110A1 High voltage MOS transistor with extended drain |
| 08/24/1994 | EP0612108A1 Double polysilicon EEPROM cell and corresponding manufacturing process |
| 08/24/1994 | EP0612107A1 Double polysilicon EEPROM cell and corresponding programming method |
| 08/24/1994 | EP0612106A1 Electronic device with reduced alpha particles soft error rate |
| 08/24/1994 | EP0612104A2 Compound semi-conductors and controlled doping thereof |
| 08/24/1994 | EP0612103A2 Method of manufacturing a silicon-on-insulator semiconductor device |
| 08/24/1994 | EP0612102A2 Crystallized semiconductor layer, semiconductor device using the same and process for their fabrication |
| 08/24/1994 | EP0612101A1 Selection device for bringing an object, for instance a substrate, to a treating station |
| 08/24/1994 | EP0611996A2 Phase shift mask and its inspection method |
| 08/24/1994 | EP0611967A1 Acceleration sensor |
| 08/24/1994 | EP0611484A1 PROCESS FOR PRODUCING A Si/FeSi 2?-HETEROSTRUCTURE |
| 08/24/1994 | EP0611483A1 Method and apparatus for controlled spray etching |
| 08/24/1994 | EP0521002B1 Short-circuit resistant transistor final stage, in particular ignition final stage for motor vehicles |
| 08/24/1994 | EP0374232B1 Method of fabricating an infrared photodetector |
| 08/24/1994 | CN1091233A Method for forming via holes in multilayer circuits |
| 08/24/1994 | CN1091210A Photomask Blanks |
| 08/23/1994 | US5341339 Method for wear leveling in a flash EEPROM memory |
| 08/23/1994 | US5341337 Semiconductor read only memory with paralleled selecting transistors for higher speed |
| 08/23/1994 | US5341327 Static random access type semiconductor memory device |
| 08/23/1994 | US5341326 Semiconductor memory having memory cell units each including cascade-connected MOS transistors |
| 08/23/1994 | US5341324 Semiconductor device and manufacturing method thereof |
| 08/23/1994 | US5341302 Job configuration for semiconductor manufacturing |
| 08/23/1994 | US5341096 Semiconductor integrated circuit having a scan circuit provided with a self-contained signal generator circuit |
| 08/23/1994 | US5341094 method of grouping of variable capacitance diodes having uniform characteristics |
| 08/23/1994 | US5341049 Integrated circuit having alternate rows of logic cells and I/O cells |
| 08/23/1994 | US5341043 Series linear antifuse array |
| 08/23/1994 | US5341041 Basic cell for BiCMOS gate array |
| 08/23/1994 | US5341030 Methods for protecting outputs of low-voltage circuits from high programming voltages |
| 08/23/1994 | US5341028 Semiconductor device and a method of manufacturing thereof |
| 08/23/1994 | US5341027 Semiconductor chip having notches formed in peripheral edges thereof |
| 08/23/1994 | US5341026 Semiconductor device having a titanium and a titanium compound multilayer interconnection structure |
| 08/23/1994 | US5341024 Method of increasing the layout efficiency of dies on a wafer, and increasing the ratio of I/O area to active area per die |
| 08/23/1994 | US5341023 Novel vertical-gate CMOS compatible lateral bipolar transistor |
| 08/23/1994 | US5341022 Bipolar transistor having a high ion concentration buried floating collector and method of fabricating the same |
| 08/23/1994 | US5341021 Bipolar transistor having an electrode structure suitable for integration |
| 08/23/1994 | US5341016 Low resistance device element and interconnection structure |
| 08/23/1994 | US5341015 Semiconductor device with reduced stress on gate electrode |
| 08/23/1994 | US5341014 Semiconductor device and a method of fabricating the same |
| 08/23/1994 | US5341013 Semiconductor device provided with sense circuits |
| 08/23/1994 | US5341012 CMOS device for use in connection with an active matrix panel |
| 08/23/1994 | US5341011 Short channel trenched DMOS transistor |
| 08/23/1994 | US5341010 Semiconductor device including nonvolatile memories |
| 08/23/1994 | US5341007 Semiconductor device and a method for fabricating the same |
| 08/23/1994 | US5341006 Laminated structure |
| 08/23/1994 | US5341005 Structure for protecting an integrated circuit from electrostatic discharges |
| 08/23/1994 | US5341003 MOS semiconductor device having a main unit element and a sense unit element for monitoring the current in the main unit element |
| 08/23/1994 | US5341000 Thin silicon carbide layer on an insulating layer |
| 08/23/1994 | US5340979 Technique for determining the amplified spontaneous emission noise of an optical circuit in the presence of an optical signal |
| 08/23/1994 | US5340914 Microwave processing |
| 08/23/1994 | US5340774 Semiconductor fabrication technique using local planarization with self-aligned transistors |
| 08/23/1994 | US5340773 Forming aluminum film pattern thicker than metallic wiring to be formed on the substrate, using aluminum pattern as mask |
| 08/23/1994 | US5340772 Method of increasing the layout efficiency of dies on a wafer and increasing the ratio of I/O area to active area per die |
| 08/23/1994 | US5340771 Techniques for providing high I/O count connections to semiconductor dies |
| 08/23/1994 | US5340770 Method of making a shallow junction by using first and second SOG layers |
| 08/23/1994 | US5340769 Method for manufacturing semiconductor device having groove-structured isolation |
| 08/23/1994 | US5340766 Method for fabricating charge-coupled device |
| 08/23/1994 | US5340765 Forming planarized layer, forming opening, forming silicon layers in opening, forming oxide layers, partially removing insulating layer and exposing outer surface of container, annealing |
| 08/23/1994 | US5340764 Integration of high performance submicron CMOS and dual-poly non-volatile memory devices using a third polysilicon layer |
| 08/23/1994 | US5340763 Multi-pin stacked capacitor utilizing micro villus patterning in a container cell and method to fabricate same |
| 08/23/1994 | US5340762 Forming islands of silicon, forming insulating layer over gate electrode portion, forming electrodes, doping, masking, heating to form emitter and drain contact regions |
| 08/23/1994 | US5340761 Self-aligned contacts with gate overlapped lightly doped drain (goldd) structure |
| 08/23/1994 | US5340759 Forming source and drain layers, etching, forming gate dielectric layer, forming conductive gate in contact with gate dielectric layer |
| 08/23/1994 | US5340758 Device self-alignment by propagation of a reference structure's topography |
| 08/23/1994 | US5340757 Method of manufacturing a vertical field effect transistor |
| 08/23/1994 | US5340756 Method for producing self-aligned LDD CMOS, DMOS with deeper source/drain and P-base regions and, bipolar devices on a common substrate |