Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/1994
09/14/1994EP0615286A2 Semiconductor device provided with isolation region
09/14/1994EP0615285A2 Attaching an electronic circuit to a substrate
09/14/1994EP0615284A2 Electronic circuit device
09/14/1994EP0615283A1 Interconnection structure of electronic parts comprising solder bumps with metal core members
09/14/1994EP0615282A2 Methods for making MOSFET's with drain separated from channel
09/14/1994EP0615281A1 Wafer release method and apparatus
09/14/1994EP0615280A1 Electrostatic chuck
09/14/1994EP0615273A1 Method and apparatus for detection of sputtering target erosion
09/14/1994EP0615203A1 Method and apparatus for fitting circuit parameter
09/14/1994EP0615163A1 Onium salts and positive resist materials using the same
09/14/1994EP0614998A1 Diamond covered member and process for producing the same
09/14/1994EP0614719A1 Mounting structure for cutting blade of dicing apparatus
09/14/1994EP0614573A1 Process for manufacturing a power integrated circuit with a vertical power component
09/14/1994EP0614567A1 Nonvolatile random access memory device.
09/14/1994EP0614497A1 Apparatus and method for treating a wafer of semiconductor material.
09/14/1994EP0570389B1 Method and device for contactless measurement of the voltage in an object with an insulating surface
09/14/1994EP0537203B1 Device with self-amplifying dynamic mos transistor storage cells
09/14/1994EP0500615B1 Process for producing a silicate layer in an integrated circuit
09/14/1994CN2177292Y Clamp for crystal thyratron radiation working technology
09/14/1994CN2177291Y X-ray graphic mask
09/14/1994CN1092207A Process for manufacture of surface adhesive bipolar body
09/14/1994CN1092013A Method of splitting ceramic substrate and splitting device
09/13/1994US5347613 MOS multi-layer neural network including a plurality of hidden layers interposed between synapse groups for performing pattern recognition
09/13/1994US5347592 Pattern judging method and mask producing method using the pattern judging method
09/13/1994US5347591 Method of and device for determining positioning between a hole and a wiring pattern on a printed circuit board by utilizing a set of area values
09/13/1994US5347561 X-ray exposure apparatus and semiconductor-device manufacturing method
09/13/1994US5347490 Nonvolatile semiconductor memory device
09/13/1994US5347486 Nonvolatile memory device having self-refresh function
09/13/1994US5347465 Method of integrated circuit chips design
09/13/1994US5347460 Method and system employing optical emission spectroscopy for monitoring and controlling semiconductor fabrication
09/13/1994US5347362 Bonding wire inspection method
09/13/1994US5347356 Substrate aligning device using interference light generated by two beams irradiating diffraction grating
09/13/1994US5347181 Interface control logic for embedding a microprocessor in a gate array
09/13/1994US5347178 CMOS semiconductor logic circuit with multiple input gates
09/13/1994US5347172 Oscillatorless substrate bias generator
09/13/1994US5347162 Preformed planar structures employing embedded conductors
09/13/1994US5347161 Stacked-layer structure polysilicon emitter contacted p-n junction diode
09/13/1994US5347159 Semiconductor chip assemblies with face-up mounting and rear-surface connection to substrate
09/13/1994US5347157 Multilayer structure having a (111)-oriented buffer layer
09/13/1994US5347156 Lateral bipolar transistor with a particular collector structure
09/13/1994US5347155 Semiconductor device having a lateral DMOST with breakdown voltage raising zones and provisions for exchanging charge with the back gate region
09/13/1994US5347154 Light valve device using semiconductive composite substrate
09/13/1994US5347153 Short channel transistors
09/13/1994US5347151 DRAM with memory cells having access transistor formed on solid phase epitaxial single crystalline layer and manufacturing method thereof
09/13/1994US5347150 Semiconductor input/output circuits operating at different power supply voltages
09/13/1994US5347148 Semi-insulating compound semiconductor device
09/13/1994US5347146 Polysilicon thin film transistor of a liquid crystal display
09/13/1994US5347145 Pad arrangement for a semiconductor device
09/13/1994US5347100 Semiconductor device, process for the production thereof and apparatus for microwave plasma treatment
09/13/1994US5346862 Method for the electrical insulation of a circuit function element on a semiconductor component
09/13/1994US5346861 Semiconductor chip assemblies and methods of making same
09/13/1994US5346860 Method for fabricating an interconnect structure in an integrated circuit
09/13/1994US5346858 Semiconductor non-corrosive metal overcoat
09/13/1994US5346857 Bonding an integrated circuit die to a substrate
09/13/1994US5346856 Method of making a selective compositional disordering of a GaAs based heterostructure by the in-diffusion of Au through a single crystal, epitaxially grown Ge film
09/13/1994US5346855 Method of making an INP-based DFB laser
09/13/1994US5346853 Microwave energized deposition process with substrate temperature control for the fabrication of P-I-N photovoltaic devices
09/13/1994US5346851 Method of fabricating Shannon Cell circuits
09/13/1994US5346850 Crystallization and doping of amorphous silicon on low temperature plastic
09/13/1994US5346849 Method of making a groove structure for isolation between elements comprising a GTO thyristor
09/13/1994US5346848 Method of bonding silicon and III-V semiconductor materials
09/13/1994US5346847 Method for fabricating a semiconductor memory device having storage node overlap with bit line
09/13/1994US5346846 Method of manufacturing a highly integrated semiconductor device
09/13/1994US5346845 Process for forming a trench capacitor memory cell
09/13/1994US5346844 Method for fabricating semiconductor memory device
09/13/1994US5346843 Method of manufacturing a semiconductor device having a memory cell and peripheral circuit including forming a first electrode for the capacitor
09/13/1994US5346842 Method of making alternate metal/source virtual ground flash EPROM cell array
09/13/1994US5346841 Method of manufacturing semiconductor device using ion implantation
09/13/1994US5346840 Method of producing heterojunction bipolar transistor having narrow band gap base type
09/13/1994US5346839 Sidewall doping technique for SOI transistors
09/13/1994US5346836 Process for forming low resistance contacts between silicide areas and upper level polysilicon interconnects
09/13/1994US5346835 Integrated circuits
09/13/1994US5346834 Method for manufacturing a semiconductor device and a semiconductor memory device
09/13/1994US5346833 Simplified method of making active matrix liquid crystal display
09/13/1994US5346806 Acid-cleavable radiation-sensitive compounds, radiation-sensitive mixture containing these compounds, and radiation-sensitive recording material produced with this mixture
09/13/1994US5346805 Photopolymerizable composition
09/13/1994US5346803 Chemical amplification type; large scale integrated microcircuits
09/13/1994US5346799 Novolak resins and their use in radiation-sensitive compositions wherein the novolak resins are made by condensing 2,6-dimethylphenol, 2,3-dimethylphenol, a para-substituted phenol and an aldehyde
09/13/1994US5346751 Electronic package using closed pore composites
09/13/1994US5346748 Fluorescent display panel containing chip of integrated circuit with discrepancy markers to aid in lead bonding
09/13/1994US5346633 Method for surface treatment of a body, surface treatment agent, surface treated body, surface treated members, and apparatus being furnished with same
09/13/1994US5346601 Sputter coating collimator with integral reactive gas distribution
09/13/1994US5346597 By placing in an etching solution containing acid or alkali and applying an alternating current
09/13/1994US5346587 Forming a layer of planarized conductive material overlying isolation regions, forming a layer of reflective material superadjacent and coextensive said conductive material and patterning
09/13/1994US5346586 Method for selectively etching polysilicon to gate oxide using an insitu ozone photoresist strip
09/13/1994US5346585 Minimize residual deposits
09/13/1994US5346584 Planarization process for IC trench isolation using oxidized polysilicon filler
09/13/1994US5346582 Dry etching apparatus
09/13/1994US5346581 Method of making a compound semiconductor device
09/13/1994US5346579 Magnetic field enhanced plasma processing chamber
09/13/1994US5346578 Integrated circuit fabrication
09/13/1994US5346557 Process for cleaning silicon mass and the recovery of nitric acid
09/13/1994US5346555 Device for thermal treatment and film forming process
09/13/1994US5346518 Vapor drain system
09/13/1994US5346513 Method for producing semiconductor device using a vacuum sealing mechanism having inner and outer bellows
09/13/1994US5346302 Apparatus for mixing liquids in a certain ratio
09/13/1994US5346118 Surface mount solder assembly of leadless integrated circuit packages to substrates
09/13/1994US5345999 Method and apparatus for cooling semiconductor wafers
09/13/1994US5345815 Atomic force microscope having cantilever with piezoresistive deflection sensor
09/13/1994US5345639 Device and method for scrubbing and cleaning substrate