Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/2005
04/21/2005US20050085047 In situ hardmask pullback using an in situ plasma resist trim process
04/21/2005US20050085046 Method of forming poly insulator poly capacitors by using a self-aligned salicide process
04/21/2005US20050085045 Method of fabrication a silicon-on-insulator device with a channel stop
04/21/2005US20050085044 Method for the production of a hetero-bipolar transistor
04/21/2005US20050085043 Method for fabricating a gate structure of a FET and gate structure of a FET
04/21/2005US20050085042 Dual gate oxide structure in semiconductor device and method thereof
04/21/2005US20050085041 Method for fabricating semiconductor memory device
04/21/2005US20050085040 Nor flash memory cell with high storage density
04/21/2005US20050085039 Nonvolatile semiconductor memory device with tapered sidewall gate and method of manufacturing the same
04/21/2005US20050085038 Non-volatile memory technology compatible with 1t-ram process
04/21/2005US20050085037 Method for fabricating NROM memory cells with trench transistors
04/21/2005US20050085036 Semiconductor device and manufacturing method thereof
04/21/2005US20050085035 Heterojunction bipolar transistor and manufacturing method making the same
04/21/2005US20050085034 Encapsulated stack of dice and support therefor
04/21/2005US20050085033 Manufacturing method of an electronic device package
04/21/2005US20050085032 Technique for evaluating a fabrication of a die and wafer
04/21/2005US20050085031 Heterogeneous activation layers formed by ionic and electroless reactions used for IC interconnect capping layers
04/21/2005US20050085029 Fabrication of gate dielectric in nonvolatile memories in which a memory cell has multiple floating gates
04/21/2005US20050085027 Semiconductor device and method for fabricating the same
04/21/2005US20050085026 Manufacturing method of semiconductor-on-insulator region structures
04/21/2005US20050085025 Method of forming gate structure
04/21/2005US20050085024 Method for producing a field-effect transistor and transistor thus obtained
04/21/2005US20050085023 Dual gate oxide high-voltage semiconductor device and method for forming the same
04/21/2005US20050085022 Strained dislocation-free channels for CMOS and method of manufacture
04/21/2005US20050085021 Display device and a method for manufacturing the same
04/21/2005US20050085020 Semiconductor device and method for fabricating the same
04/21/2005US20050085019 System and method for reducing or eliminating semiconductor device wire sweep
04/21/2005US20050085017 Semiconductor wafer manufacturing method, semiconductor wafer mnaufacturing order acceptance method, and semiconductor wafer manufacturing order acceptance system
04/21/2005US20050085016 Structure and method of making capped chips using sacrificial layer
04/21/2005US20050085014 Semiconductor substrate for build-up packages
04/21/2005US20050085011 Thermally enhanced packaging structure and fabrication method thereof
04/21/2005US20050085009 Method of manufacturing a semiconductor device
04/21/2005US20050085008 Process for strengthening semiconductor substrates following thinning
04/21/2005US20050085007 Joining material stencil and method of use
04/21/2005US20050085006 Methods for wafer-level packaging of microelectronic devices and microelectronic devices formed by such methods
04/21/2005US20050085004 Method of forming a semi-insulating region
04/21/2005US20050085003 Silicon-based thin-film photoelectric conversion device and method of manufacturing thereof
04/21/2005US20050085002 Thin film semiconductor device and its substrate sheet as well as the method for production thereof
04/21/2005US20050085000 Manufacturing methods of MEMS device
04/21/2005US20050084995 Method of forming a CMOS transistor
04/21/2005US20050084994 Light-emitting device and method for manufacturing light-emitting device
04/21/2005US20050084991 Method for manufacturing semiconductor optical amplifier having planar buried heterostructure
04/21/2005US20050084990 Endpoint detection in manufacturing semiconductor device
04/21/2005US20050084989 Semiconductor device manufacturing method
04/21/2005US20050084987 Tuning electrodes used in a reactor for electrochemically processing a microelectronic workpiece
04/21/2005US20050084986 Semiconductor test board having laser patterned conductors
04/21/2005US20050084985 Methods and apparatuses for producing a polymer memory device
04/21/2005US20050084984 Method for forming ferrocapacitors and FeRAM devices
04/21/2005US20050084895 Bioarray chip reaction apparatus and its manufacture
04/21/2005US20050084806 Wiring pattern (mask layout) in the form of a line including angled portions with a local difference in line width is divided into rectangular patterns each having a large area and node portions interconnecting the rectangular patterns; high correction accuracy
04/21/2005US20050084805 Method for forming patterned ITO structure by using photosensitive ITO solution
04/21/2005US20050084796 Resist compositions and patterning process
04/21/2005US20050084795 (Meth)acrylic acid-alkyl acrylate copolymer, distilled water and an amine salt of a halide or carboxylate or a crown compound; neutralize acid produced in the upper portion of a photoresist film to uniform the vertical distribution of the acids allowing vertical and fine patterns to be obtained
04/21/2005US20050084792 salt of hydrofluoric acid with a non-metal base, a water-soluble organic solvent, a mercapto group containing corrosion inhibitor, and water; protects aluminum and copper wiring from corrosion while stripping photoresist films and post-ashing residues; nonprecipitating corrosion inhibitor
04/21/2005US20050084782 Exposure method and exposure management system
04/21/2005US20050084778 Reticle alignment procedure
04/21/2005US20050084772 Mask for exposing an alignment mark, and method and computer program for designing the mask
04/21/2005US20050084767 directing pulsed laser beams through substrates and focusing it on a target located in the substrate adjacent to coating layers, to write a diffractive optical element, thus changing the scattering properties of the substrate at the target location; masks for use in photolithography
04/21/2005US20050084766 lithography using computer controlled imaging layouts, such as spatial light modulators (SLM), with an improved virtual grid
04/21/2005US20050084692 base material with coating layer made predominantly of yttrium oxide having a thickness of 10 mu m or more; yttrium oxide of coating layer contains solid solution silicon ranging from 100 ppm to 1000 ppm; uniform thermal spray
04/21/2005US20050084661 immersion of conductors in lead-free liquid containing metals, group 1B and acyclic oxy acid and salts, then precipitating the metals on the surfaces and coating in electroless plating solutions; supports for semiconductors, capacitors or resistors
04/21/2005US20050084654 Component for vacuum apparatus, production method thereof and apparatus using the same
04/21/2005US20050084619 Method to deposit an impermeable film on porous low-k dielectric film
04/21/2005US20050084617 Method for coating internal surface of plasma processing chamber
04/21/2005US20050084615 monitoring the characteristics of processing fluids using detectors and external controllers
04/21/2005US20050084187 Hydrodynamic bearing apparatus and stage apparatus using the same
04/21/2005US20050083770 Thin-film magnetic memory device executing data writing with data write magnetic fields in two directions
04/21/2005US20050083765 Multi-port static random access memory
04/21/2005US20050083756 Semiconductor storage device and method of fabricating the same
04/21/2005US20050083750 Nonvolatile semiconductor storage apparatus and method of manufacturing the same
04/21/2005US20050083744 Semiconductor memory device with MOS transistors each having a floating gate and a control gate
04/21/2005US20050083736 Semiconductor integrated circuit
04/21/2005US20050083735 Behavior based programming of non-volatile memory
04/21/2005US20050083734 Magnetic random access memory
04/21/2005US20050083733 Method for reading memory cells
04/21/2005US20050083732 MRAM having two write conductors
04/21/2005US20050083731 Magnetic random access memory
04/21/2005US20050083730 Magnetic random access memory
04/21/2005US20050083729 Process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction
04/21/2005US20050083728 Soft-reference magnetic memory digitizing device and method of operation
04/21/2005US20050083727 Magnetic thin film element, memory element using the same, and method for recording and reproducing using the memory element
04/21/2005US20050083724 DRAM cell array and memory cell arrangement having vertical memory cells and methods for fabricating the same
04/21/2005US20050083717 Antifuse programming circuit in which one stage of transistor is interposed in a series with antifuse between power supplies during programming
04/21/2005US20050083634 Retaining device, especially for fixing a semiconductor wafer in a plasma etching device, and method for supply heat to or discharging heat from a substrate
04/21/2005US20050083625 Reverse circulation protection circuit
04/21/2005US20050083623 ESD protection circuit between different voltage sources
04/21/2005US20050083621 Mechanism for preventing ESD damage and LCD panel utilizing the same
04/21/2005US20050083620 Esd protection circuit with a stack-coupling device
04/21/2005US20050083612 Method and apparatus for manufacturing a magnetoresistive multilayer film
04/21/2005US20050083508 Lithographic apparatus, device manufacturing method, and slide assembly
04/21/2005US20050083507 Projection exposure system for microlithography and method for generating microlithographic images
04/21/2005US20050083506 Projection exposure system for microlithography and method for generating microlithographic images
04/21/2005US20050083505 System and method for laser beam expansion
04/21/2005US20050083504 Lithographic apparatus and device manufacturing method
04/21/2005US20050083503 Multi mirror system for an illumination system
04/21/2005US20050083501 Scanning exposure apparatus and device manufacturing method
04/21/2005US20050083500 Lithographic apparatus and device manufacturing method
04/21/2005US20050083498 [dynamic mask module]
04/21/2005US20050083496 Lithographic apparatus and device manufacturing method
04/21/2005US20050083472 Display device having a plurality of leads connected to a single common line