Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2005
07/07/2005US20050148196 Method and system for patterning material in a thin film device
07/07/2005US20050148194 Structure and manufacturing method for nitride-based light-emitting diodes
07/07/2005US20050148193 Photolithographic method for forming a structure in a semiconductor substrate
07/07/2005US20050148192 Method for removal of pattern resist over patterned metal having an underlying spacer layer
07/07/2005US20050148191 Method of manufacturing semiconductor device
07/07/2005US20050148190 Damascene process for fabricating interconnect layers in an integrated circuit
07/07/2005US20050148189 Method of manufacturing a layer sequence and a method of manufacturing an integrated circuit
07/07/2005US20050148188 System and method for monitoring particles contamination in semiconductor manufacturing facilities
07/07/2005US20050148187 Chemical mechanical polishing systems and methods for their use
07/07/2005US20050148186 Slurry composition with high planarity and CMP process of dielectric film using the same
07/07/2005US20050148185 Polishing cloth and method of manufacturing semiconductor device
07/07/2005US20050148184 Chemical mechanical polishing process for forming shallow trench isolation structure
07/07/2005US20050148182 Compositions for planarization of metal-containing surfaces using halogens and halide salts
07/07/2005US20050148181 Method for producing a silicon wafer
07/07/2005US20050148180 Photoresist process to enable sloped passivation bondpad openings for ease of metal step coverings
07/07/2005US20050148179 Organic semiconductor composition, organic semiconductor element, and process for producing the same
07/07/2005US20050148178 Method for fabricating a p-channel field-effect transistor on a semiconductor substrate
07/07/2005US20050148177 Method and an apparatus for manufacturing a semiconductor device
07/07/2005US20050148176 Method of manufacturing a semiconductor device
07/07/2005US20050148175 Semiconductor device and manufacturing method thereof
07/07/2005US20050148174 Contact-connection of nanotubes
07/07/2005US20050148173 Non-volatile memory array having vertical transistors and manufacturing method thereof
07/07/2005US20050148172 Seed layers for metallic interconnects
07/07/2005US20050148171 Method for filling trench and relief geometries in semiconductor structures
07/07/2005US20050148170 Developer-soluble materials and methods of using the same in via-first dual damascene applications
07/07/2005US20050148169 Solvent vapor-assisted plasticization of photoresist films to achieve critical dimension reduction during temperature reflow
07/07/2005US20050148168 Method for fabricating a through hole on a semiconductor substrate
07/07/2005US20050148167 Method and apparatus for forming insulating layer
07/07/2005US20050148166 [structure applied to a photolithographic process and method for fabricating a semiconductor device]
07/07/2005US20050148165 Conductive pattern producing method and its applications
07/07/2005US20050148164 A suspension for filling via holes in silicon and method for making the same
07/07/2005US20050148163 Method of catastrophic transfer of a thin film after co-implantation
07/07/2005US20050148162 Method of preventing surface roughening during hydrogen pre-bake of SiGe substrates using chlorine containing gases
07/07/2005US20050148161 Method of preventing surface roughening during hydrogen prebake of SiGe substrates
07/07/2005US20050148160 Encapsulated semiconductor components and methods of fabrication
07/07/2005US20050148159 Process of cutting electronic package
07/07/2005US20050148158 Method of dividing a substrate into a plurality of individual chip parts
07/07/2005US20050148157 Backside unlayering of MOSFET devices for electrical and physical characterization
07/07/2005US20050148156 Method of removing unnecessary matter from semiconductor wafer, and apparatus using the same
07/07/2005US20050148155 Method of manufacturing a semiconductor integrated circuit device and a semiconductor integrated circuit device
07/07/2005US20050148154 Semiconductor device and manufacturing method therefor
07/07/2005US20050148153 Method of dry etching semiconductor device
07/07/2005US20050148152 Method for forming shallow trench in semiconductor device
07/07/2005US20050148151 Plasma display panel and manufacturing method thereof
07/07/2005US20050148149 Method of manufacturing variable capacitance diode and variable capacitance diode
07/07/2005US20050148148 Method of forming a source/drain and a transistor employing the same
07/07/2005US20050148147 Amorphous etch stop for the anisotropic etching of substrates
07/07/2005US20050148146 High performance strained CMOS devices
07/07/2005US20050148145 Semiconductor memory cell with buried dopant bit lines and salicided polysilicon word lines isolated by an array of blocks
07/07/2005US20050148144 Selective post-doping of gate structures by means of selective oxide growth
07/07/2005US20050148143 Deposition method of insulating layers having low dielectric constant of semiconductor device, a thin film transistor substrate using the same and a method of manufacturing the same
07/07/2005US20050148142 High performance FET with laterally thin extension
07/07/2005US20050148141 Methods of forming memory cells and arrays having underlying source-line connections
07/07/2005US20050148140 Method for scalable, low-cost polysilicon capacitor in a planar dram
07/07/2005US20050148139 Method of manufacturing semiconductor device
07/07/2005US20050148138 Method of manufacturing semiconductor device
07/07/2005US20050148137 Nonplanar transistors with metal gate electrodes
07/07/2005US20050148136 Cmos device with metal and silicide gate electrodes and a method for making it
07/07/2005US20050148135 Method of fabricating a complementary bipolar junction transistor
07/07/2005US20050148134 CMOS performance enhancement using localized voids and extended defects
07/07/2005US20050148133 Method of making strained channel CMOS transistors having lattice-mismatched epitaxial
07/07/2005US20050148132 Alignment method for fabrication of integrated ultrasonic transducer array
07/07/2005US20050148131 Method of varying etch selectivities of a film
07/07/2005US20050148130 Method for making a semiconductor device that includes a metal gate electrode
07/07/2005US20050148129 Organic semiconductor device having an active dielectric layer comprising silsesquioxanes
07/07/2005US20050148128 Method of manufacturing a closed cell trench MOSFET
07/07/2005US20050148127 Semiconductor device including gate dielectric layer formed of high dielectric alloy and method of fabricating the same
07/07/2005US20050148125 Low cost source drain elevation through poly amorphizing implant technology
07/07/2005US20050148124 ESD protection for semiconductor products
07/07/2005US20050148123 Method for fabricating self-aligned thin-film transistor
07/07/2005US20050148122 Substrate, manufacturing method therefor, and semiconductor device
07/07/2005US20050148121 Manufacturing method of thin film integrated circuit device and manufacturing method of non-contact type thin film integrated circuit device
07/07/2005US20050148120 Polycide gate stucture and manufacturing method thereof
07/07/2005US20050148119 Method of manufacturing thin film transistor, method of manufacturing flat panel display, thin film transistor, and flat panel display
07/07/2005US20050148118 Horizontal TRAM and method for the fabrication thereof
07/07/2005US20050148117 Method for fabricating a flash-preventing window ball grid array semiconductor package
07/07/2005US20050148115 Programmed material consolidation methods for fabricating heat sinks
07/07/2005US20050148114 Method and apparatus providing CMOS imager device pixel with transistor having lower threshold voltage than other imager device transistors
07/07/2005US20050148112 Method of manufacturing an electronic device, and electronic device
07/07/2005US20050148111 Method and system for producing resilient solder joints
07/07/2005US20050148110 Method for producing a luminescence diode chip
07/07/2005US20050148109 Partially transparent photovoltaic modules
07/07/2005US20050148108 Manufacturing method of monocrystalline gallium nitride localized substrate
07/07/2005US20050148106 Method of transferring a device, a method of producing a device holding substrate, and a device holding substrate
07/07/2005US20050148105 Process for producing light-emitting semiconductor device
07/07/2005US20050148104 Process controls for improved wafer uniformity using integrated or standalone metrology
07/07/2005US20050148103 Chip data providing system and chip data providing server used therefore
07/07/2005US20050148102 Low-swing bus driver and receiver
07/07/2005US20050148079 Using semiconductor wafers and colorimetric analysis to determine whether oxygen is leaking into a loading chamber of a vertical-type furnace
07/07/2005US20050148027 Very large scale immobilized polymer synthesis
07/07/2005US20050147930 Dimensional precision photolithography; high density and microfabrication of semiconductor devices; removal of antireflective film undercoating without affecting resist film
07/07/2005US20050147925 System and method for analog replication of microdevices having a desired surface contour
07/07/2005US20050147923 Forming opening in laminated photoresist uppermost layer by irradiating with light to pattern; reducing diameter of opening formed by coating thickening material; high throughput, low cost; transistors
07/07/2005US20050147922 Method for exposing a photosensitive resist layer with near-field light
07/07/2005US20050147920 Method and system for immersion lithography
07/07/2005US20050147913 High volume reticle (HVR) configured for registration with a low volume reticle; an array of dies; plurality of scribeswrapped around each die in array of dies; processing of gate arrays, embedded arrays and rapid chips
07/07/2005US20050147902 Least squares analysis of position of an object with alignment marks; projector
07/07/2005US20050147901 Lithography pattern shrink process and articles
07/07/2005US20050147896 A first mask pattern is set perpendicular to a second mask pattern, each has a width not larger than the resolution limit thus restraining the optical proximity effect, improved fidelity of the microminiaturization mask pattern
07/07/2005US20050147852 Chemical and corrosion resist protective coatings; multilayer composite comprising a metal alloy undercoatings, yttrium oxide overcoatings which was formed by spraying under depressurization