Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2005
07/21/2005US20050156819 Substrate identification circuit and semiconductor device
07/21/2005US20050156691 Microwave transmission line
07/21/2005US20050156617 Test pattern of semiconductor device and test method using the same
07/21/2005US20050156616 Integrated circuit device
07/21/2005US20050156615 Semiconductor integrated circuit device
07/21/2005US20050156614 Semiconductor inspection device and method for manufacturing contact probe
07/21/2005US20050156613 Probe card
07/21/2005US20050156610 Probe station
07/21/2005US20050156605 Circuits for transistor testing
07/21/2005US20050156589 Semiconductor device and test method for the same
07/21/2005US20050156552 Driving apparatus, exposure apparatus, and device manufacturing method
07/21/2005US20050156530 Inductively coupled plasma generator having lower aspect ratio
07/21/2005US20050156499 Polymer sustained microelectrodes
07/21/2005US20050156495 Display unit
07/21/2005US20050156487 Piezoelectric o-ring transducer
07/21/2005US20050156485 Matching circuit for megasonic transducer device
07/21/2005US20050156473 Polyphase linear motor and its drive method, and stage device, exposure system, and device manufacturing method using the polyphase linear motor
07/21/2005US20050156334 Alignment mark system and method to improve wafer alignment search range
07/21/2005US20050156332 Damascene interconnection and semiconductor device
07/21/2005US20050156331 Semiconductor devices having stereolithographically fabricated protective layers thereon through which contact pads are exposed and assemblies including the same
07/21/2005US20050156330 Through-wafer contact to bonding pad
07/21/2005US20050156329 Semiconductor device by embedded package
07/21/2005US20050156327 Colored conductive wires for a semiconductor package
07/21/2005US20050156326 Board for mounting BGA semiconductor chip thereon, semiconductor device, and methods of fabricating such board and semiconductor device
07/21/2005US20050156325 Die attach by temperature gradient lead free soft solder metal sheet or film
07/21/2005US20050156324 Method for manufacturing connection construction
07/21/2005US20050156323 Semiconductor apparatus
07/21/2005US20050156321 Process for producing a semiconductor device
07/21/2005US20050156320 Integrated device including connections on a separate wafer
07/21/2005US20050156317 Low dielectric constant film produced from silicon compounds comprising silicon-carbon bonds
07/21/2005US20050156316 Refractory metal nitride barrier layer with gradient nitrogen concentration
07/21/2005US20050156315 Titanium alloy sputtering targets are reactively sputtered in nitrogen-comprising sputtering gas atmosphere to from titanium alloy nitride film; noncolumnar grain structure, low electrical resistivity, high chemical stability, and barrier layer properties comparable or exceeding those of tantalum nitride
07/21/2005US20050156314 Support ring for use with a contact pad and semiconductor device components including the same
07/21/2005US20050156313 Inspection device and method for manufacturing the same, method for manufacturing electro-optic device and method for manufacturing semiconductor device
07/21/2005US20050156311 Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument
07/21/2005US20050156309 Semiconductor sensor
07/21/2005US20050156308 Connecting elements on semiconductor chips for semiconductor components and methods for producing the same
07/21/2005US20050156305 Semiconductor integrated circuit device
07/21/2005US20050156302 System for manufacturing microelectronic, microoptoelectronic or micromechanical devices
07/21/2005US20050156301 Method of packaging an optical sensor
07/21/2005US20050156298 Semiconductor device including semiconductor elements mounted on base plate
07/21/2005US20050156291 Flipchip QFN package and method therefor
07/21/2005US20050156290 Concealable chip leadframe unit structure
07/21/2005US20050156288 UV-activated dielectric layer
07/21/2005US20050156287 Organic polymer film, method for producing the same and semiconductor device using the same
07/21/2005US20050156286 Method for improving a physical property defect value of a gate dielectric
07/21/2005US20050156285 Low k and ultra low k SiCOH dielectric films and methods to form the same
07/21/2005US20050156283 Semiconductor device
07/21/2005US20050156282 Semiconductor device and method of its manufacture
07/21/2005US20050156281 HIGH TOLERANCE TCR BALANCED HIGH CURRENT RESISTOR FOR RF CMOS AND RF SiGe BiCMOS APPLICATIONS AND CADENCED BASED HIERARCHICAL PARAMETERIZED CELL DESIGN KIT WITH TUNABLE TCR AND ESD RESISTOR BALLASTING FEATURE
07/21/2005US20050156280 Integrated circuit packages with sandwiched capacitors
07/21/2005US20050156279 Capacitor and semiconductor device and method for fabricating the semiconductor device
07/21/2005US20050156278 Compatible with high K dielectric materials and copper metallurgy; for integrated circuits used in radio frequency and other high-frequency applications
07/21/2005US20050156277 Semiconductor device
07/21/2005US20050156276 Semiconductor device and manufacturing method thereof
07/21/2005US20050156274 Strained channel transistor and methods of manufacture
07/21/2005US20050156273 Memory devices
07/21/2005US20050156272 Semiconductor devices having storage nodes
07/21/2005US20050156270 Semiconductor device and method of manufacturing same
07/21/2005US20050156269 Method and apparatus for performing nickel salicidation
07/21/2005US20050156268 Dual strain-state SiGe layers for microelectronics
07/21/2005US20050156267 Semiconductor device provided with temperature detection function
07/21/2005US20050156265 Lithography device for semiconductor circuit pattern generation
07/21/2005US20050156263 Fabrication process for embedding optical band gap structures in a low temperature co-fired ceramic substrate
07/21/2005US20050156259 Mems array, manufacturing method thereof, and mems device manufacturing method based on the same
07/21/2005US20050156258 Method of forming silicide film having excellent thermal stability, semiconductor device and semiconductor memory device comprising silicide film formed of the same, and methods of manufacturing the semiconductor device and the semiconductor memory device
07/21/2005US20050156257 Complementary metal oxide semiconductor (CMOS) gate stack with high dielectric constant gate dielectric and integrated diffusion barrier
07/21/2005US20050156256 Method of fabricating lanthanum oxide layer and method of fabricating MOSFET and capacitor using the same
07/21/2005US20050156255 Noble high-k device
07/21/2005US20050156254 Ultra-shallow metal oxide surface channel MOS transistor
07/21/2005US20050156253 Structure and method to form source and drain regions over doped depletion regions
07/21/2005US20050156252 Method for forming a polycide gate and structure of the same
07/21/2005US20050156250 Semiconductor device with smoothed pad portion
07/21/2005US20050156249 Bipolar transistor and semiconductor device using same
07/21/2005US20050156248 Semiconductor device with raised segment
07/21/2005US20050156247 Device and method for protecting gate terminal and lead
07/21/2005US20050156246 Methods of forming strained-semiconductor-on-insulator device structures
07/21/2005US20050156245 Semiconductor device formed in semiconductor layer arranged on substrate with one of insulating film and cavity interposed between the substrate and the semiconductor layer
07/21/2005US20050156244 Thin film apparatus, a manufacturing method of the thin film apparatus, an active matrix substrate, a manufacturing method of the active matrix substrate, and an electro-optical apparatus having the active matrix substrate
07/21/2005US20050156243 Thin film transistors and methods of forming thin film transistors
07/21/2005US20050156242 Semiconductor device, method of manufacturing same and method of designing same
07/21/2005US20050156240 Thin film transistors and semiconductor constructions
07/21/2005US20050156239 Method for forming pattern of stacked film and thin film transistor
07/21/2005US20050156238 Silicide gate transistors and method of manufacture
07/21/2005US20050156237 Transistor sidewall spacer stress modulation
07/21/2005US20050156236 MOS transistor with a three-step source/drain implant
07/21/2005US20050156235 Semiconductor device with alternating conductivity type layer and method of manufacturing the same
07/21/2005US20050156234 Control of hot carrier injection in a metal-oxide semiconductor device
07/21/2005US20050156233 Stacked gate flash memory device and method of fabricating the same
07/21/2005US20050156230 Output prediction logic circuits with ultra-thin vertical transistors and methods of formation
07/21/2005US20050156229 Integrated circuit device and method therefor
07/21/2005US20050156228 Manufacture method and structure of a nonvolatile memory
07/21/2005US20050156227 Nonvolatile memory with undercut trapping structure
07/21/2005US20050156226 Mask ROM and the method of forming the same and the scheme of reading the device
07/21/2005US20050156225 Methods of fabricating semiconductor devices with scalable two transistor memory cells
07/21/2005US20050156224 Method to make minimal spacing between floating gates in split gate flash
07/21/2005US20050156223 Flash memory cell with a unique split programming channel and reading channel
07/21/2005US20050156222 Capacitor of an integrated circuit device and method of manufacturing the same
07/21/2005US20050156221 Semiconductor device and method of manufacturing same
07/21/2005US20050156220 Semiconductor device and method of manufacturing the same