Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2005
07/21/2005US20050159085 Method of chemically mechanically polishing substrates
07/21/2005US20050159082 Polishing apparatus
07/21/2005US20050159019 Method for manufacturing large area stamp for nanoimprint lithography
07/21/2005US20050159018 Atomic layer deposition methods, and methods of forming materials over semiconductor substrates
07/21/2005US20050159017 Nitrogenous compositions for forming silicon nitride layers and methods of forming silicon nitride layers using the same
07/21/2005US20050159016 Electron exposure to reduce line edge roughness
07/21/2005US20050159015 Method for forming interlayer insulation film
07/21/2005US20050159014 Processing method for annealing and doping a semiconductor
07/21/2005US20050159013 Film formation method
07/21/2005US20050159012 Semiconductor interconnect structure
07/21/2005US20050159011 Selective etching silicon nitride
07/21/2005US20050159010 Plasma processing apparatus
07/21/2005US20050159009 Gate electrode and manufacturing method thereof, and semiconductor device and manufacturing method thereof
07/21/2005US20050159008 High temperature hydrogen annealing of a gate insulator layer to increase etching selectivity between conductive gate structure and gate insulator layer
07/21/2005US20050159007 Manufacturing method of shallow trench isolation structure
07/21/2005US20050159006 Method of forming electrical connection means of ultimate dimensions and device comprising such connection means
07/21/2005US20050159005 Semiconductor device manufacture method
07/21/2005US20050159004 System for reducing corrosion effects of metallic semiconductor structures
07/21/2005US20050159003 Chemical mechanical polishing compositions and methods relating thereto
07/21/2005US20050159001 Insulating film composition having improved mechanical property
07/21/2005US20050159000 Method for fabricating nitride-based compound semiconductor element
07/21/2005US20050158999 Multi-step plasma treatment method to improve CU interconnect electrical performance
07/21/2005US20050158998 Atomic layer deposition methods, and methods of forming materials over semiconductor substrates
07/21/2005US20050158996 Nickel salicide processes and methods of fabricating semiconductor devices using the same
07/21/2005US20050158995 Low-fluence irradiation for lateral crystallization enabled by a heating source
07/21/2005US20050158994 PCMO spin-coat deposition
07/21/2005US20050158993 Lncuo(s,se,te)monocrystalline thin film, its manufacturing method, and optical device or electronic device using the monocrystalline thin film
07/21/2005US20050158992 Cladded conductor for use in a magnetoelectronics device and method for fabricating the same
07/21/2005US20050158991 Metal plating using seed film
07/21/2005US20050158990 Methods of forming metal wiring layers for semiconductor devices
07/21/2005US20050158989 Method of forming wiring and method of manufacturing image display system by using the same
07/21/2005US20050158988 Fabrication method for arranging ultra-fine particles
07/21/2005US20050158987 Method for forming via hole and trench for dual damascene interconnection
07/21/2005US20050158986 Method of forming contact plug on silicide structure
07/21/2005US20050158985 Copper recess process with application to selective capping and electroless plating
07/21/2005US20050158984 Method for manufacturing semiconductor device
07/21/2005US20050158983 Method for producing silicon nitride films and process for fabricating semiconductor devices using said method
07/21/2005US20050158982 Semiconductor device manufacturing method
07/21/2005US20050158981 Method of fabricating display panel
07/21/2005US20050158979 Method of manufacturing semiconductor device
07/21/2005US20050158978 Hermetic passivation structure with low capacitance
07/21/2005US20050158977 Methods and apparatus for forming thin films for semiconductor devices
07/21/2005US20050158976 Floating gate memory cell and forming method
07/21/2005US20050158975 Method of improving etching profile of floating gates for flash memory devices
07/21/2005US20050158974 Method for making a semiconductor device having a metal gate electrode
07/21/2005US20050158973 Low-temperature grown high quality ultra-thin CoTiO3 gate dielectrics
07/21/2005US20050158972 Method for manufacturing bit line contact structure of semiconductor memory
07/21/2005US20050158971 Relaxed silicon germanium substrate with low defect density
07/21/2005US20050158970 Tri-gate transistors and methods to fabricate same
07/21/2005US20050158969 Control of thermal donor formation in high resistivity CZ silicon
07/21/2005US20050158968 Wafer laser processing method
07/21/2005US20050158967 Semiconductor chip singulation method
07/21/2005US20050158966 Method to avoid a laser marked area step height
07/21/2005US20050158965 Methods for filling high aspect ratio trenches in semiconductor layers
07/21/2005US20050158964 Method of forming an STI feature to avoid electrical charge leakage
07/21/2005US20050158963 Method of forming planarized shallow trench isolation
07/21/2005US20050158962 Semiconductor device and process for fabricating the same
07/21/2005US20050158961 Trench capacitor with buried strap
07/21/2005US20050158959 Quantum wire gate device and method of making same
07/21/2005US20050158958 Semiconductor device comprising metal silicide films formed to cover gate electrode and source-drain diffusion layers and method of manufacturing the same
07/21/2005US20050158957 Creating shallow junction transistors
07/21/2005US20050158956 Dual step source/drain extension junction anneal to reduce the junction depth: multiple-pulse low energy laser anneal coupled with rapid thermal anneal
07/21/2005US20050158955 Method and apparatus to increase strain effect in a transistor channel
07/21/2005US20050158954 Method for fabricating semiconductor device
07/21/2005US20050158953 Method for fabricating an NROM memory cell arrangement
07/21/2005US20050158951 Methods of fabricating semiconductor memory devices including different dielectric layers for the cell transistors and refresh transistors thereof
07/21/2005US20050158950 Non-volatile memory cell comprising a dielectric layer and a phase change material in series
07/21/2005US20050158949 Semiconductor devices
07/21/2005US20050158948 Semiconductor device having self-aligned contact plug and method for fabricating the same
07/21/2005US20050158947 Method for Forming Self-Aligned Trench
07/21/2005US20050158946 Methods of forming spaced conductive regions, methods of recessing conductive material and methods of forming capacitor constructions
07/21/2005US20050158945 Memory cell and method for fabricating it
07/21/2005US20050158944 Mixed-mode process
07/21/2005US20050158943 Manufacturing method of semiconductor device
07/21/2005US20050158942 Bipolar transistor with graded base layer
07/21/2005US20050158941 Methods of fabricating semiconductor devices
07/21/2005US20050158940 Process of forming high-k gate dielectric layer for metal oxide semiconductor transistor
07/21/2005US20050158939 Method of fabricating isolated semiconductor devices in epi-less substrate
07/21/2005US20050158938 Deep well implant structure providing latch-up resistant CMOS semiconductor product
07/21/2005US20050158937 Method and structure for controlling stress in a transistor channel
07/21/2005US20050158936 Semiconductor device, method of manufacturing the same, and method of designing the same
07/21/2005US20050158935 Method of forming a metal gate in a semiconductor device
07/21/2005US20050158934 Semiconductor devices having field effect transistors and methods of fabricating the same
07/21/2005US20050158933 Semiconductor device having a plurality of gate electrodes and manufacturing method thereof
07/21/2005US20050158932 Method of manufacturing semiconductor device
07/21/2005US20050158931 Method of making strained semiconductor transistors having lattice-mismatched semiconductor regions underlying source and drain regions
07/21/2005US20050158930 Method of manufacturing a semiconductor device
07/21/2005US20050158929 Semiconductor device and method for manufacturing the same
07/21/2005US20050158928 Method of fabricating thin film transistor with multiple gates using super grain silicon crystallization
07/21/2005US20050158927 Structure and method of forming a notched gate field effect transistor
07/21/2005US20050158926 Methods of forming thin-film transistor display devices
07/21/2005US20050158925 Thin film transistor array panel and manufacturing method thereof
07/21/2005US20050158924 Polycrystalline Silicon Layer With Nano-grain Structure and Method of Manufacture
07/21/2005US20050158923 Ultra-thin body transistor with recessed silicide contacts
07/21/2005US20050158922 Method of manufacturing a semiconductor device
07/21/2005US20050158921 SOI substrate
07/21/2005US20050158920 Thin film transistor with multiple gates using super grain silicon crystallization
07/21/2005US20050158917 Manufacturing method for resin sealed semiconductor device
07/21/2005US20050158915 Semiconductor device and method of fabricating the same
07/21/2005US20050158914 Process for manufacturing microelectronic, microoptoelectronic or micromechanical devices
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