Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2005
07/21/2005WO2005067041A1 Wire-bonded integrated circuit package and manufacturing method thereof
07/21/2005WO2005067035A1 Method for forming non-amorphous, ultra-thin semiconductor devices using sacrificial implantation layer
07/21/2005WO2005067034A1 A cmos device with metal and silicide gate electrodes and a method for making it
07/21/2005WO2005067033A1 Methods for integrating replacement metal gate structures
07/21/2005WO2005067032A1 Dual damascene process using carbon doped and carbon free oxide layers
07/21/2005WO2005067031A1 Ferroelectric thin films and devices comprising thin ferroelectric films
07/21/2005WO2005067030A1 Support system for semiconductor wafers and methods thereof
07/21/2005WO2005067029A1 Method for packaging integrated circuit dies
07/21/2005WO2005067028A1 A semiconductor device and a process for packaging a semiconductor device
07/21/2005WO2005067027A1 Replacement gate flow facilitating high yield and incorporation of etch stop layers and/or stressed films
07/21/2005WO2005067026A1 A method for making a semiconductor device that includes a metal gate electrode
07/21/2005WO2005067025A1 Method of forming wiring structure and semiconductor device
07/21/2005WO2005067024A1 Method and apparatus for etching an organic layer
07/21/2005WO2005067023A1 Substrate processing apparatus
07/21/2005WO2005067022A1 Shower plate, plasma processing system, and process for producing product
07/21/2005WO2005067021A1 An amorphous etch stop for the anisotropic etching of substrates
07/21/2005WO2005067020A2 A method of varying etch selectivities of a film
07/21/2005WO2005067019A1 System and method for selective etching of silicon nitride during substrate processing
07/21/2005WO2005067018A1 Method for producing semiconductor device
07/21/2005WO2005067016A1 Vaporizer for cvd, solution voporizing cvd system and voporization method for cvd
07/21/2005WO2005067015A1 Film forming device and film forming method
07/21/2005WO2005067014A1 Strained transistor integration for cmos
07/21/2005WO2005067012A1 Exposure method and apparatus, and device producing method
07/21/2005WO2005067011A1 Coater/developer and coating/developing method
07/21/2005WO2005067009A2 Process controls for improved wafer uniformity using integrated or standalone metrology
07/21/2005WO2005067008A2 Method and system for coating polymer solution on a substrate in a solvent saturated chamber
07/21/2005WO2005067007A1 A non-dripping nozzle apparatus
07/21/2005WO2005067006A1 Methods for adaptive real time control of a thermal processing system
07/21/2005WO2005067005A1 Small volume process chamber with hot inner surfaces
07/21/2005WO2005066920A1 Display
07/21/2005WO2005066717A1 Method and apparatus for removing photoresist from a substrate
07/21/2005WO2005066658A1 Ion beam measuring method and ion implanting apparatus
07/21/2005WO2005066621A1 Surface acoustic wave sensor assemblies
07/21/2005WO2005066579A1 Method and apparatus for measuring fillm thickness by means of coupled eddy sensors
07/21/2005WO2005066392A2 Surface structuring by means of a film
07/21/2005WO2005066391A1 Copper electrodeposition in microelectronics
07/21/2005WO2005066386A2 A method and apparatus for forming a high quality low temperature silicon nitride layer
07/21/2005WO2005066325A2 Cleaner compositions containing free radical quenchers
07/21/2005WO2005066091A2 High strain point glasses
07/21/2005WO2005066087A2 Aluminum silicophosphate glasses
07/21/2005WO2005065936A1 Hot pressing ceramic distortion control
07/21/2005WO2005065882A1 Laser processing method and device
07/21/2005WO2005065881A1 Laser processing method and device
07/21/2005WO2005065849A1 Core for washing sponge roller
07/21/2005WO2005065436A2 Method and apparatus for maintaining parallelism of layers and/or achieving desired thicknesses of layers during the electrochemical fabrication of structures
07/21/2005WO2005065433A2 Electrochemical fabrication methods incorporating dielectric materials and/or using dielectric substrates
07/21/2005WO2005065430A2 Electrochemical fabrication methods for producing multilayer structures including the use of diamond machining in the planarization of deposits of material
07/21/2005WO2005065425A2 Localized synthesis and self-assembly of nanostructures
07/21/2005WO2005065424A2 Micro pin grid array with wiping action
07/21/2005WO2005065385A2 Power semiconductor devices and methods of manufacture
07/21/2005WO2005065281A2 Articles comprising high-electrical-conductivity nanocomposite material and method for fabricating same
07/21/2005WO2005065273A2 System and method for self-leveling heat sink for multiple height devices
07/21/2005WO2005065255A2 Semiconductor chip package
07/21/2005WO2005065238A2 Micro pin grid array with pin motion isolation
07/21/2005WO2005065207A2 Microelectronic packages and methods therefor
07/21/2005WO2005065179A2 Method of manufacturing a superjunction device
07/21/2005WO2005065144A2 Planarization method of manufacturing a superjunction device
07/21/2005WO2005065143A2 Isotopically pure silicon-on-insulator wafers and method of making same
07/21/2005WO2005065140A2 Method of manufacturing a superjunction device with conventional terminations
07/21/2005WO2005065127A2 A method for forming thick dielectric regions using etched trenches
07/21/2005WO2005065089A2 Method of manufacturing a semiconductor component, and semiconductor component formed thereby
07/21/2005WO2005065072A2 Electrospray systems and methods
07/21/2005WO2005065021A2 Texturing a semiconductor material using negative potential dissolution (npd)
07/21/2005WO2005045903A3 Method for making a flat-top pad
07/21/2005WO2005043623A3 Method for forming a dielectric on a metallic layer and capacitor assembly
07/21/2005WO2005041272A3 Production method and device for improving the bonding between plastic and metal
07/21/2005WO2005041271A3 Method and device for fixing a chip in a housing
07/21/2005WO2005031846A3 Electrochemical etching process for the selective removal of contaminant phases on the surface of a sulphide-containing chalcopyrite semiconductor
07/21/2005WO2005020279A3 Semiconductor device having electrical contact from opposite sides and method therefor
07/21/2005WO2005015613A3 Perimeter partition-valve with protected seals
07/21/2005WO2005013358A3 Arrangement of an electrical component placed on a substrate, and method for producing the same
07/21/2005WO2005010936A3 Edge bead control method and apparatus
07/21/2005WO2005008743A3 A semiconductor device with metallic electrodes and a method for use in forming such a device
07/21/2005WO2005008739A3 Micellar technology for post-etch residues
07/21/2005WO2004097518A3 A method of forming stepped structures employing imprint lithography
07/21/2005WO2004078411A3 Method and apparatus for local polishing control
07/21/2005WO2004070838A3 Device and method for encapsulating with encapsulating material and electronic component fixed on a carrier
07/21/2005WO2004068554A3 Analysis and monitoring of stresses in embedded lines and vias integrated on substrates
07/21/2005WO2004053939A3 Integrated circuit structure with improved ldmos design
07/21/2005WO2004052785B1 High purity nickel/vanadium sputtering components; and methods of making sputtering components
07/21/2005WO2003073357A8 Methods and apparatus for fabricating chip-on-board modules
07/21/2005US20050160394 Driven inspection or measurement
07/21/2005US20050160393 Method of automatically correcting mask pattern data and program for the same
07/21/2005US20050160391 Semiconductor integrated circuit having multi-level interconnection, CAD method and CAD tool for designing the semiconductor integrated circuit
07/21/2005US20050160389 Method of protecting a semiconductor integrated circuit from plasma damage
07/21/2005US20050160388 Streamlined IC mask layout optical and process correction through correction reuse
07/21/2005US20050160383 Combined e-beam and optical exposure semiconductor lithography
07/21/2005US20050160381 Designing and fabrication of a semiconductor device
07/21/2005US20050160338 Integrated circuit with test circuit
07/21/2005US20050160336 Semiconductor LSI circuit with scan circuit, scan circuit system, scanning test system and method
07/21/2005US20050159911 Method and apparatus for automatic sensor installation
07/21/2005US20050159909 Method of defect review
07/21/2005US20050159899 Device and method for monitoring process exhaust gas, semiconductor manufacturing device, and system and method for controlling semiconductor manufacturing device
07/21/2005US20050159835 Device for and method of creating a model for determining relationship between process and quality
07/21/2005US20050159576 Novel poly(arylene ether) dielectrics
07/21/2005US20050159520 An polyacrylate binder, and a solvent system as solid component for protecting base material during etching, characterized by that 70 % or more removed from the base material when subjected to pre-baking thermal stability test
07/21/2005US20050159322 Aqueous cleaning solution for integrated circuit device and method of cleaning using the cleaning solution
07/21/2005US20050159090 Polishing apparatus
07/21/2005US20050159089 Double-side polishing method and apparatus
07/21/2005US20050159086 Methods for planarization of group VIII metal-containing surfaces using complexing agents