Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2005
08/18/2005US20050180194 Nano tube cell and memory device using the same
08/18/2005US20050180193 Memory device using multiple layer nano tube cell
08/18/2005US20050180192 Ferroelectric-type nonvolatile semiconductor memory
08/18/2005US20050180187 Semiconductor device, IC card, IC tag, RFID, transponder, bills, securities, passport, electronic apparatus, bag, and clothes
08/18/2005US20050180186 Shield plate for limiting cross coupling between floating gates
08/18/2005US20050180122 Electronic circuit module
08/18/2005US20050180117 Semiconductor device and method of manufacturing the same
08/18/2005US20050180076 Electrostatic discharge protection circuit
08/18/2005US20050180073 Electrostatic discharge (ESD) protection device with simultaneous and distributed self-biasing for multi-finger turn-on
08/18/2005US20050180011 Objective with pupil obscuration
08/18/2005US20050180008 Stationary and dynamic radial transverse electric polarizer for high numerical aperture systems
08/18/2005US20050179976 High performance MEMS scanner
08/18/2005US20050179909 Lithographic apparatus, device manufacturing method, and method for determining z-displacement
08/18/2005US20050179898 Position detection method and apparatus, and exposure method and apparatus
08/18/2005US20050179886 Method of predicting and minimizing model OPC deviation due to mix/match of exposure tools using a calibrated eigen decomposition model
08/18/2005US20050179885 Light irradiation apparatus, light irradiation method, crystallization apparatus, crystallization method, device, and light modulation element
08/18/2005US20050179884 Lithographic apparatus and device manufacturing method
08/18/2005US20050179883 System for automated focus measuring of a lithography tool
08/18/2005US20050179882 Lithographic apparatus and device manufacturing method
08/18/2005US20050179881 Exposure apparatus and method
08/18/2005US20050179880 Lithographic apparatus and device manufacturing method with feed-forward focus control
08/18/2005US20050179879 Lithographic apparatus, interferometer and device manufacturing method
08/18/2005US20050179877 Lithographic apparatus and device manufacturing method
08/18/2005US20050179829 Flat panel display with black matrix and method of fabricating thereof
08/18/2005US20050179730 Thermal head and bonding connection method therefor
08/18/2005US20050179485 Semiconductor device having internal power supply voltage dropping circuit
08/18/2005US20050179460 Method and apparatus for testing semiconductor device chip wafer
08/18/2005US20050179457 Burn-in test apparatus for BGA packages using forced heat exhaust
08/18/2005US20050179453 Integrated substrate transfer module
08/18/2005US20050179452 Configurable prober for TFT LCD array test
08/18/2005US20050179451 Configurable prober for TFT LCD array testing
08/18/2005US20050179440 Method of inspecting a semiconductor dynamic quantity sensor
08/18/2005US20050179427 Probe station
08/18/2005US20050179369 Panel substrate, display panel, organic EL panel, and method of manufacturing the same
08/18/2005US20050179365 Active matrix display device
08/18/2005US20050179340 Surface acoustic wave device and surface acoustic wave filter comprising the device
08/18/2005US20050179143 Semiconductor component having stiffener, circuit decal and terminal contacts
08/18/2005US20050179142 Flip-chip attach structure
08/18/2005US20050179141 Methods of forming metal interconnections of semiconductor devices by treating a barrier metal layer
08/18/2005US20050179140 Formation of interconnect structures by removing sacrificial material with supercritical carbon dioxide
08/18/2005US20050179139 Semiconductor device with cobalt silicide contacts
08/18/2005US20050179138 Method for creating barriers for copper diffusion
08/18/2005US20050179135 Semiconductor device having porous structure
08/18/2005US20050179134 Semiconductor device having multilayer structure and method for manufacturing thereof
08/18/2005US20050179133 Semiconductor device
08/18/2005US20050179132 Interconnect structure for TFT-array substrate and method for fabricating the same
08/18/2005US20050179131 Semiconductor device and manufacturing method thereof
08/18/2005US20050179130 Semiconductor device
08/18/2005US20050179129 High-frequency wiring structure and method for producing the same
08/18/2005US20050179128 Semiconductor device with capacitor
08/18/2005US20050179127 Stack MCP and manufacturing method thereof
08/18/2005US20050179125 Thermally enhanced metal capped BGA package
08/18/2005US20050179124 Method for fabricating semiconductor component with stiffener and circuit decal
08/18/2005US20050179123 Dual-sided substrate integrated circuit package including a leadframe having leads with increased thickness
08/18/2005US20050179122 IC card
08/18/2005US20050179120 Process for producing semiconductor device, semiconductor device, circuit board and electronic equipment
08/18/2005US20050179118 Method of forming a semiconductor package and leadframe therefor
08/18/2005US20050179116 Semiconductor device and a method of manufacture therefor
08/18/2005US20050179115 Semiconductor device and a method of manufacture therefor
08/18/2005US20050179114 Semiconductor device and method of manufacturing the same
08/18/2005US20050179112 Filling high aspect ratio isolation structures with polysilazane based material
08/18/2005US20050179111 Semiconductor device with low resistive path barrier
08/18/2005US20050179110 Semiconductor integrated circuit device
08/18/2005US20050179109 Isolation structure configurations for modifying stresses in semiconductor devices
08/18/2005US20050179107 Low doped layer for nitride-based semiconductor device
08/18/2005US20050179106 Schottky barrier diode
08/18/2005US20050179105 Diode and method for manufacturing the same
08/18/2005US20050179104 Lateral conduction schottky diode with plural mesas
08/18/2005US20050179103 Semiconductor device and method for fabricating the same
08/18/2005US20050179100 Micromechanical capacitive transducer and method for producing the same
08/18/2005US20050179099 Integrated getter area for wafer level encapsulated microelectromechanical systems
08/18/2005US20050179098 Method to form a metal silicide gate device
08/18/2005US20050179097 Atomic layer deposition of CMOS gates with variable work functions
08/18/2005US20050179096 Complimentary nitride transistors vertical and common drain
08/18/2005US20050179095 Non-volatile memory cell
08/18/2005US20050179094 SRAM cell and method of manufacturing the same
08/18/2005US20050179093 Buried guard ring and radiation hardened isolation structures and fabrication methods
08/18/2005US20050179092 Method of fabricating high voltage device using double epitaxial growth
08/18/2005US20050179091 Semiconductor device and its manufacturing method
08/18/2005US20050179090 Semiconductor device and method for manufacturing the same
08/18/2005US20050179089 Semiconductor device
08/18/2005US20050179085 Semiconductor device and manufacturing method of the same
08/18/2005US20050179083 Semiconductor device
08/18/2005US20050179082 Semiconductor device and method for fabricating the same
08/18/2005US20050179081 Bidirectional semiconductor device, method of fabricating the same, and semiconductor device incorporating the same
08/18/2005US20050179080 Method and system for forming source regions in memory devices
08/18/2005US20050179079 Nor-type channel-program channel-erase contactless flash memory on SOI
08/18/2005US20050179078 Non-volatile memory devices including high-voltage transistors and methods of fabricating the same
08/18/2005US20050179077 Monolithic integrated soi circuit with capacitor
08/18/2005US20050179076 Method of forming DRAM capactiors with protected outside crown surface for more robust structures
08/18/2005US20050179075 Transistors having a channel region between channel-portion holes and methods of forming the same
08/18/2005US20050179074 Semiconductor device and manufacturing method thereof
08/18/2005US20050179073 Integrated circuit devices having buried insulation layers and methods of forming the same
08/18/2005US20050179072 Isolation region implant permitting improved photodiode structure
08/18/2005US20050179071 Angled implant for trench isolation
08/18/2005US20050179070 Junction-isolated depletion mode ferroelectric memory devices and systems
08/18/2005US20050179069 Semiconductor device and method of manufacturing same
08/18/2005US20050179068 Integrated semiconductor circuit having a logic and power metallization without intermetal dielectric
08/18/2005US20050179067 Semiconductor device and fabricating method thereof
08/18/2005US20050179066 Fabricating strained channel epitaxial source/drain transistors
1 ... 3737 3738 3739 3740 3741 3742 3743 3744 3745 3746 3747 3748 3749 3750 3751 3752 3753 3754 3755 3756 3757 ... 6590