Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2005
11/10/2005US20050250330 integrated circuit; diffusion barrier layer is covalently attached to the silicon substrate
11/10/2005US20050250329 Compositions for chemical mechanical planarization of tantalum and tantalum nitride
11/10/2005US20050250328 Copper interconnection and the method for fabricating the same
11/10/2005US20050250327 Copper plating of semiconductor devices using intermediate immersion step
11/10/2005US20050250326 Method of manufacturing a semiconductor device
11/10/2005US20050250325 Methods of forming metal-containing structures
11/10/2005US20050250324 Plating apparatus
11/10/2005US20050250323 Under bump metallization layer to enable use of high tin content solder bumps
11/10/2005US20050250322 Semiconductor device and its manufacturing method
11/10/2005US20050250321 Method for fabricating semiconductor device having diffusion barrier layer
11/10/2005US20050250320 Plasma treatment at film layer to reduce sheet resistance and to improve via contact resistance
11/10/2005US20050250319 Stabilization of Ni monosilicide thin films in CMOS devices using implantation of ions before silicidation
11/10/2005US20050250318 CVD tantalum compounds for FET gate electrodes
11/10/2005US20050250317 Semiconductor device and method of fabricating the same
11/10/2005US20050250316 Methods for fabricating memory devices using sacrifical layers and memory devices fabricated by same
11/10/2005US20050250315 Methods of forming electrical connections for semiconductor constructions
11/10/2005US20050250314 Method for fabricating metal interconnection line with use of barrier metal layer formed in low temperature
11/10/2005US20050250313 Compressive alpha-tantalum thin film stack
11/10/2005US20050250312 Structure and process of metal interconnects
11/10/2005US20050250311 Method of manufacturing semiconductor device
11/10/2005US20050250310 Multi-layer interconnection circuit module and manufacturing method thereof
11/10/2005US20050250309 Semiconductor device using low-K material as interlayer insulating film and its manufacture method
11/10/2005US20050250308 Method for manufacturing semiconductor device
11/10/2005US20050250307 Interconnection structures for semicondcutor devices and methods of forming the same
11/10/2005US20050250306 Method for manufacturing a semiconductor substrate and method for manufacturing an electro-optical device
11/10/2005US20050250305 Carbon nanotube (CNT) multiplexers, circuits, and actuators
11/10/2005US20050250304 Method for fabricating connection regions of an integrated circuit, and integrated circuit having connection regions
11/10/2005US20050250303 Method for bonding IC chips to substrates incorporating dummy bumps and non-conductive adhesive
11/10/2005US20050250302 Thin films and methods of making them
11/10/2005US20050250301 Self-aligned metal to form contacts to Ge containing substrates and structure formed thereby
11/10/2005US20050250300 Low ohmic layout technique for MOS transistors
11/10/2005US20050250299 Method for implanting ions in semiconductor device
11/10/2005US20050250298 In situ doped epitaxial films
11/10/2005US20050250297 Process for metallic contamination reduction in silicon wafers
11/10/2005US20050250296 Method of fabricating semiconductor device
11/10/2005US20050250295 Semiconductor device manufacturing method and ring-shaped reinforcing member
11/10/2005US20050250294 Method for forming a relaxed or pseudo-relaxed useful layer on a substrate
11/10/2005US20050250293 Method for fabricating semiconductor device having trench isolation
11/10/2005US20050250292 Methods for forming backside alignment markers useable in semiconductor lithography
11/10/2005US20050250291 Methods for clearing alignment markers useable in semiconductor lithography
11/10/2005US20050250290 Trench and a trench capacitor and method for forming the same
11/10/2005US20050250289 Control of dopant diffusion from buried layers in bipolar integrated circuits
11/10/2005US20050250288 Source/drain extension implant process for use with short time anneals
11/10/2005US20050250287 Method of semiconductor fabrication incorporating disposable spacer into elevated source/drain processing
11/10/2005US20050250286 Method of forming gate insulation film using plasma method of fabricating poly-silicon thin film transistor using the same
11/10/2005US20050250285 Fin field effect transistor device and method of fabricating the same
11/10/2005US20050250284 Method for fabricating semiconductor device with recessed channel region
11/10/2005US20050250283 Non-volatile memory cells having floating gate and method of forming the same
11/10/2005US20050250282 Flash memory device having a split gate and method of manufacturing the same
11/10/2005US20050250281 Method for manufacturing resistively switching memory devices
11/10/2005US20050250280 Capacitance process by using passivation film scheme
11/10/2005US20050250279 Methods of forming semiconductor devices having buried oxide patterns and devices related thereto
11/10/2005US20050250278 Methods and apparatus for wordline protection in flash memory devices
11/10/2005US20050250277 Method for reclaiming and reusing wafers
11/10/2005US20050250276 Superlattice nanopatterning of wires and complex patterns
11/10/2005US20050250275 Dual work function metal gates and methods of forming
11/10/2005US20050250274 Gettering using voids formed by surface transformation
11/10/2005US20050250273 Display device and manufacturing method of the same
11/10/2005US20050250272 Biosensor performance enhancement features and designs
11/10/2005US20050250271 Dual work function gate electrodes
11/10/2005US20050250270 Process of manufacturing thin film transistor
11/10/2005US20050250269 Method of fabricating semiconductor device
11/10/2005US20050250268 Method of fabricating semiconductor device
11/10/2005US20050250267 Method of heat treating thin film transistor using metal induced lateral crystallization
11/10/2005US20050250266 Semiconductor device having a gate oxide film with some NTFTS with LDD regions and no PTPTS with LDD regions
11/10/2005US20050250265 Method of fabricating poly-silicon thin film transistor using metal induced lateral crystallization
11/10/2005US20050250264 Thin film transistor device and method of manufacturing the same
11/10/2005US20050250263 Apparatus and methods for integrated circuit with devices with body contact and devices with electrostatic discharge protection
11/10/2005US20050250262 Thin-film transistor structure, method for manufacturing the thin-film transistor structure, and display device using the thin-film transistor structure
11/10/2005US20050250260 Method of fabricating liquid crystal display device
11/10/2005US20050250259 SOI-type semiconductor device, and production method for manufacturing such SOI-type semiconductor device
11/10/2005US20050250258 Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode
11/10/2005US20050250257 Method of forming a super-junction semiconductor device
11/10/2005US20050250256 Semiconductor device and fabricating method thereof
11/10/2005US20050250255 Over-passivation process of forming polymer layer over IC chip
11/10/2005US20050250254 Method of manufacturing a semiconductor device and a fabrication apparatus for a semiconductor device
11/10/2005US20050250253 Processes for hermetically packaging wafer level microscopic structures
11/10/2005US20050250251 Method and apparatus for decoupling conductive portions of a microelectronic device package
11/10/2005US20050250249 Method of making an electronic package
11/10/2005US20050250248 Reworkable b-stageable adhesive and use in waferlevel underfill
11/10/2005US20050250247 Method for internal electrical insulation of a substrate for a power semiconductor module
11/10/2005US20050250246 Method and apparatus for shielding integrated circuits
11/10/2005US20050250245 Semiconductor chip arrangement and method
11/10/2005US20050250244 Method of fabricating a desired pattern of electronically functional material
11/10/2005US20050250243 Electronic and optoelectronic devices and methods for preparing same
11/10/2005US20050250242 Image sensor device and manufacturing method thereof
11/10/2005US20050250241 CMOS image sensor having prism and method for fabricating the same
11/10/2005US20050250240 Method for fabricating complementary metal-oxide semiconductor image sensor with reduced etch damage
11/10/2005US20050250239 Method of manufacturing thermal type flow sensing elements
11/10/2005US20050250237 Microstructured component and a method for producing a microstructured component
11/10/2005US20050250236 Damascene process for use in fabricating semiconductor structures having micro/nano gaps
11/10/2005US20050250235 Controlling electromechanical behavior of structures within a microelectromechanical systems device
11/10/2005US20050250234 Semiconductor device and method for fabrication thereof
11/10/2005US20050250233 Nitride semiconductor and fabrication method thereof
11/10/2005US20050250231 Method of manufacturing LCOS spacers
11/10/2005US20050250230 Control TFT for OLED display
11/10/2005US20050250229 Method of magnetic field assisted self-assembly
11/10/2005US20050250228 Divided shadow mask for fabricating organic light emitting diode displays
11/10/2005US20050250227 Method to detect photoresist residue on a semiconductor device
11/10/2005US20050250226 Method for generating work-in-process schedules
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