Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2005
11/22/2005US6967685 Solid-state image pickup element including a thinning method to discharge unnecessary image data
11/22/2005US6967622 Plasma device and plasma generating method
11/22/2005US6967555 Multi-level symmetrical inductor
11/22/2005US6967497 Wafer processing apparatuses and electronic device workpiece processing apparatuses
11/22/2005US6967493 Probe card and contactor of the same
11/22/2005US6967490 Real-time in-line testing of semiconductor wafers
11/22/2005US6967412 Wafer level underfill and interconnect process
11/22/2005US6967409 Semiconductor device and method of manufacturing the same
11/22/2005US6967408 Gate stack structure
11/22/2005US6967407 Semiconductor device and method of manufacturing the semiconductor device
11/22/2005US6967405 Film for copper diffusion barrier
11/22/2005US6967401 Semiconductor device, semiconductor module and hard disk
11/22/2005US6967399 Semiconductor device manufacturing method having a step of applying a copper foil on a substrate as a part of a wiring connecting an electrode pad to a mounting terminal
11/22/2005US6967397 Test circuit and multi-chip package type semiconductor device having the test circuit
11/22/2005US6967392 Seal ring structure for radio frequency integrated circuits
11/22/2005US6967388 Semiconductor devices and methods for fabricating the same
11/22/2005US6967386 Magnetic memory device
11/22/2005US6967384 Structure and method for ultra-small grain size polysilicon
11/22/2005US6967383 Transistor with nitrogen-hardened gate oxide
11/22/2005US6967382 Integrated circuit devices including raised source/drain structures having different heights
11/22/2005US6967381 Semiconductor device
11/22/2005US6967380 CMOS device having retrograde n-well and p-well
11/22/2005US6967379 Semiconductor device including metal insulator semiconductor field effect transistor
11/22/2005US6967378 Semiconductor integrated circuit device configured to prevent the generation of a reverse current in a MOS transistor
11/22/2005US6967377 Double-gate fet with planarized surfaces and self-aligned silicides
11/22/2005US6967376 Divot reduction in SIMOX layers
11/22/2005US6967375 Reduction of chemical mechanical planarization (CMP) scratches with sacrificial dielectric polish stop
11/22/2005US6967373 Two-bit charge trap nonvolatile memory device and methods of operating and fabrication the same
11/22/2005US6967372 Semiconductor memory array of floating gate memory cells with vertical control gate sidewalls and insulation spacers
11/22/2005US6967371 System with meshed power and signal buses on cell array
11/22/2005US6967370 Integrated semiconductor circuit having a multiplicity of memory cells
11/22/2005US6967368 Ferro-electric memory device and method of manufacturing the same
11/22/2005US6967367 Ferro-electric memory device and method of manufacturing the same
11/22/2005US6967365 Ferroelectric memory cell with angled cell transistor active region and methods for fabricating the same
11/22/2005US6967364 Elevated photo diode in an image sensor
11/22/2005US6967360 Pseudomorphic high electron mobility transistor with Schottky electrode including lanthanum and boron, and manufacturing method thereof
11/22/2005US6967359 Nitride semiconductor substrate production method thereof and semiconductor optical device using the same
11/22/2005US6967358 Thyristor-type memory device
11/22/2005US6967355 Group III-nitride on Si using epitaxial BP buffer layer
11/22/2005US6967354 Light emitting semiconductor package
11/22/2005US6967351 Finfet SRAM cell using low mobility plane for cell stability and method for forming
11/22/2005US6967350 Memory structures
11/22/2005US6967328 Method for the electron-microscopic observation of a semiconductor arrangement and apparatus therefor
11/22/2005US6967316 Method for fabricating image sensor including isolation layer having trench structure
11/22/2005US6967313 Hot plate and method of producing the same
11/22/2005US6967312 Semiconductor manufacturing/testing ceramic heater, production method for the ceramic heater and production system for the ceramic heater
11/22/2005US6967177 Temperature control system
11/22/2005US6967176 Method for making silicon containing dielectric films
11/22/2005US6967175 Damascene gate semiconductor processing with local thinning of channel region
11/22/2005US6967174 Wafer chuck for use in edge bevel removal of copper from silicon wafers
11/22/2005US6967173 Hydrogen plasma photoresist strip and polymeric residue cleanup processs for low dielectric constant materials
11/22/2005US6967172 Colloidal silica composite films for premetal dielectric applications
11/22/2005US6967171 Insulation film etching method
11/22/2005US6967170 Methods of forming silicon nitride spacers, and methods of forming dielectric sidewall spacers
11/22/2005US6967169 Aqueous cleaning composition containing copper-specific corrosion inhibitor for cleaning inorganic residues on semiconductor substrate
11/22/2005US6967168 Method to repair localized amplitude defects in a EUV lithography mask blank
11/22/2005US6967167 Silicon dioxide removing method
11/22/2005US6967166 Method for monitoring and controlling force applied on workpiece surface during electrochemical mechanical processing
11/22/2005US6967165 Method for fabricating multilayer interconnect and method for checking the same
11/22/2005US6967164 Method for electroless plating a contact pad
11/22/2005US6967162 Method of copper/copper surface bonding using a conducting polymer for application in IC chip bonding
11/22/2005US6967161 Method and resulting structure for fabricating DRAM cell structure using oxide line spacer
11/22/2005US6967160 Method of manufacturing semiconductor device having nickel silicide with reduced interface roughness
11/22/2005US6967159 Systems and methods for forming refractory metal nitride layers using organic amines
11/22/2005US6967158 Method for forming a low-k dielectric structure on a substrate
11/22/2005US6967157 Method of forming buried wiring in semiconductor device
11/22/2005US6967156 Method to fabricate aligned dual damascene openings
11/22/2005US6967155 Adhesion of copper and etch stop layer for copper alloy
11/22/2005US6967154 Enhanced atomic layer deposition
11/22/2005US6967153 Bump fabrication process
11/22/2005US6967152 Multilevel electronic circuit and method of making the same
11/22/2005US6967151 Method of manufacturing a semiconductor device
11/22/2005US6967150 Method of forming self-aligned contact in fabricating semiconductor device
11/22/2005US6967149 Storage structure with cleaved layer
11/22/2005US6967147 Nitrogen implantation using a shadow effect to control gate oxide thickness in DRAM semiconductor
11/22/2005US6967146 Isolation region forming methods
11/22/2005US6967145 Method of maintaining photolithographic precision alignment after wafer bonding process
11/22/2005US6967144 Low doped base spacer for reduction of emitter-base capacitance in bipolar transistors with selectively grown epitaxial base
11/22/2005US6967143 Semiconductor fabrication process with asymmetrical conductive spacers
11/22/2005US6967142 Semiconductor devices and methods of manufacturing the same
11/22/2005US6967141 Method of manufacturing a semiconductor integrated circuit device having a trench
11/22/2005US6967140 Quantum wire gate device and method of making same
11/22/2005US6967139 Method of manufacturing semiconductor device
11/22/2005US6967138 Process for manufacturing a substrate with embedded capacitor
11/22/2005US6967137 Forming collar structures in deep trench capacitors with thermally stable filler material
11/22/2005US6967136 Method and structure for improved trench processing
11/22/2005US6967135 Method of forming capacitor of semiconductor device
11/22/2005US6967134 Methods of forming nitrogen-containing masses, silicon nitride layers, and capacitor constructions
11/22/2005US6967133 Method for fabricating a semiconductor structure
11/22/2005US6967132 Methods of forming semiconductor circuitry
11/22/2005US6967131 Field effect transistor with electroplated metal gate
11/22/2005US6967130 Method of forming dual gate insulator layers for CMOS applications
11/22/2005US6967129 Semiconductor device and fabrication method thereof
11/22/2005US6967127 Methods for making semiconductor packages with leadframe grid arrays
11/22/2005US6967125 Quad flat no lead (QFN) grid array package, method of making and memory module and computer system including same
11/22/2005US6967124 Imprinted integrated circuit substrate and method for imprinting an integrated circuit substrate
11/22/2005US6967123 Adhesive die attachment method for a semiconductor die and arrangement for carrying out the method
11/22/2005US6967122 Group III nitride compound semiconductor and method for manufacturing the same
11/22/2005US6967121 Buried channel CMOS imager and method of forming same
11/22/2005US6967120 Pinned photodiode for a CMOS image sensor and fabricating method thereof
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