Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2005
11/17/2005US20050255620 Web fabrication of devices
11/17/2005US20050255619 CMOS-compatible light emitting aperiodic photonic structures
11/17/2005US20050255617 Method for manufacturing display device
11/17/2005US20050255616 Active matrix display devices, and their manufacture
11/17/2005US20050255615 Semiconductor light emitting element and method for manufacturing the same
11/17/2005US20050255613 Manufacturing of field emission display device using carbon nanotubes
11/17/2005US20050255612 Method of attaching a leadframe to singulated semiconductor dice
11/17/2005US20050255611 Defect identification system and method for repairing killer defects in semiconductor devices
11/17/2005US20050255610 Semiconductor wafer shape evaluating method and shape evaluating device
11/17/2005US20050255609 Delivery position aligning method for use in a transfer system and a processing system employing the method
11/17/2005US20050255581 Self-organized nanopore arrays with controlled symmetry and order
11/17/2005US20050255413 Forming resist film on substrate, irradiating selectively the resist film with exposure to light with a liquid on resist film, and forming resist pattern by developing film, wherein step of performing pattern exposure includes sub-step of removing a gas included in film; prevents diffraction abnormality
11/17/2005US20050255389 Phase shift mask and method of producing the same
11/17/2005US20050255387 Single exposure of mask levels having a lines and spaces array using alternating phase-shift mask
11/17/2005US20050255386 Mask for semiconductor (integrated circuits) manufacture composed of a layer with a chemical reaction interface that provides enhanced etch selectivity, especially a tunable, etch-resistant anti-reflective coating material.
11/17/2005US20050255257 Method of controlling the film properties of PECVD-deposited thin films
11/17/2005US20050255244 Lifting glass substrate without center lift pins
11/17/2005US20050255243 Mixing different chemical precursors together in a chamber during a single pulse step in atomic layer deposition (ALD) to form a mono-layer having multiple chemical compounds on the surface; e.g. dielectric hafnium silicon nitride from hafnium dialkyl amides, tetrakis(dialkylamino)silane and ammonia
11/17/2005US20050255241 Gas supply device and treating device
11/17/2005US20050255237 Additive and subtractive correction using direct write nanolithography; fine control over lateral dimensions and height; printing an ink from polymer-coated tip to substrate to form structure on substrate, wherein tip is scanned by position system which provides scanning feedback; biotechnology
11/17/2005US20050255057 Cosmetic formulations comprising ZnO nanoparticles
11/17/2005US20050254932 Wafer scanning system with reciprocating rotary motion utilizing springs and counterweights
11/17/2005US20050254804 Semiconductor thermal process control
11/17/2005US20050254773 Method for improving the imaging properties of at least two optical elements and photolithographic fabrication method
11/17/2005US20050254395 Laser irradiation method and laser irradiation apparatus
11/17/2005US20050254326 Semiconductor integrated circuit for reducing crosstalk and method for designing the same
11/17/2005US20050254325 Semiconductor integrated circuit and method of testing same
11/17/2005US20050254323 Method for detecting column fail by controlling sense amplifier of memory device
11/17/2005US20050254314 Voltage generator
11/17/2005US20050254303 Nand flash memory device
11/17/2005US20050254298 Channel erase type nonvolatile semiconductor memory device and electronic card and electronic apparatus using the device
11/17/2005US20050254294 Magnetic random access memory
11/17/2005US20050254290 Thin film magnetic memory device including memory cells having a magnetic tunnel junction
11/17/2005US20050254289 Magnetic memory device and method of manufacturing the same
11/17/2005US20050254288 Magnetic random access memory and method of writing data in magnetic random access memory
11/17/2005US20050254280 Mask ROM
11/17/2005US20050254279 DRAM memory cell arrangement
11/17/2005US20050254190 ESD dissipative structural components
11/17/2005US20050254188 Semiconductor integrated circuit device
11/17/2005US20050254154 Method and apparatus for managing actinic intensity transients in a lithography mirror
11/17/2005US20050254120 Optical imaging system, in particular catadioptric reduction objective
11/17/2005US20050254068 Measuring instrument and method for operating a measuring instrument for optical inspection of an object
11/17/2005US20050254051 Method of polishing thin film formed on substrate
11/17/2005US20050254042 Method for optimizing the image properties of at least two optical elements as well as methods for optimizing the image properties of at least three optical elements
11/17/2005US20050254036 Stage device, exposure apparatus, and device manufacturing method
11/17/2005US20050254033 Illuminating optical system, exposure method
11/17/2005US20050254031 Immersion photolithography system and method using inverted wafer-projection optics interface
11/17/2005US20050254030 Alignment system and method and device manufactured thereby
11/17/2005US20050254028 Lithographic apparatus and device manufacturing method
11/17/2005US20050254026 Exposure apparatus and method
11/17/2005US20050254025 Lithographic apparatus and device manufacturing method
11/17/2005US20050254024 Lithographic apparatus and device manufacturing method
11/17/2005US20050253979 Liquid crystal display and thin film transistor array panel therefor
11/17/2005US20050253638 Method and circuit arrangement for resetting an integrated circuit
11/17/2005US20050253624 Apparatus and method adapted to use one-time programming devices for multiple-time programming
11/17/2005US20050253620 Method for testing using a universal wafer carrier for wafer level die burn-in
11/17/2005US20050253619 Method for testing using a universal wafer carrier for wafer level die burn-in
11/17/2005US20050253618 Work function controlled probe for measuring properties of a semiconductor wafer and method of use thereof
11/17/2005US20050253613 Probe apparatus with optical length-measuring unit and probe testing method
11/17/2005US20050253611 Probe apparatus
11/17/2005US20050253608 Electrical test device
11/17/2005US20050253607 Electric signal connecting device and probe assembly and probing device using the same
11/17/2005US20050253575 Reliability evaluation test apparatus, reliability evaluation test system, contactor, and reliability evaluation test method
11/17/2005US20050253510 Light-emitting device and display device
11/17/2005US20050253463 Stage apparatus, plane motor, and device manufacturing method
11/17/2005US20050253341 Plasma resistant seal
11/17/2005US20050253286 Epoxy resin composition for semiconductor encapsulation, semiconductor device using the same, and process for producing semiconductor device
11/17/2005US20050253285 Supporting unit for semiconductor manufacturing device and semiconductor manufacturing device with supporting unit installed
11/17/2005US20050253284 Semiconductor package and method for fabricating the same
11/17/2005US20050253281 Vibration-assisted method for underfilling flip-chip electronic devices
11/17/2005US20050253280 Semiconductor device and method for fabricating the same
11/17/2005US20050253279 Semiconductor chip package and method for fabricating the same
11/17/2005US20050253275 Flip chip package and process of forming the same
11/17/2005US20050253274 Semiconductor device of chip-on-chip structure, assembling process therefor, and semiconductor chip to be bonded to solid surface
11/17/2005US20050253273 Method for integrating pre-fabricated chip structures into functional electronic systems
11/17/2005US20050253272 Semiconductor device and its manufacturing method
11/17/2005US20050253271 Semiconductor apparatus
11/17/2005US20050253269 Semiconductor device
11/17/2005US20050253268 Method and structure for improving adhesion between intermetal dielectric layer and cap layer
11/17/2005US20050253267 Semiconductor device
11/17/2005US20050253266 Semiconductor device and method for manufacturing the same
11/17/2005US20050253265 Metal seed layer deposition
11/17/2005US20050253264 Semiconductor device and method of manufacturing the semiconductor device
11/17/2005US20050253263 Wiring substrate and process for manufacturing the same
11/17/2005US20050253262 Method of manufacturing different bond pads on the same substrate of an integrated circuit package
11/17/2005US20050253261 Electronic device package structures
11/17/2005US20050253258 Solder flow stops for semiconductor die substrates
11/17/2005US20050253257 Integrated passive devices
11/17/2005US20050253255 Integrated passive devices
11/17/2005US20050253254 Windowed package for electronic circuitry
11/17/2005US20050253251 Heat sink and method for processing surfaces thereof
11/17/2005US20050253250 Mold gates, tape substrates with the mold gates, and packaging methods
11/17/2005US20050253249 Multi-layered complementary wire structure and manufacturing method thereof
11/17/2005US20050253248 Multilayer wiring substrate and method of manufacturing multilayer wiring substrate
11/17/2005US20050253247 Semiconductor device and manufacturing method therefor
11/17/2005US20050253245 Package design and method for electrically connecting die to package
11/17/2005US20050253242 Semiconductor die attachment for high vacuum tubes
11/17/2005US20050253241 Semiconductor device assemblies including an encapsulant located over intermediate conductive elements and filling a space between a semiconductor die and a carrier of the assembly
11/17/2005US20050253240 Micromechanical component and corresponsing production method
11/17/2005US20050253238 Systems for degating packaged semiconductor device with tape substrates
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