Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2009
06/02/2009US7541290 Methods of forming mask patterns on semiconductor wafers that compensate for nonuniform center-to-edge etch rates during photolithographic processing
06/02/2009US7541289 Process for removing high stressed film using LF or HF bias power and capacitively coupled VHF source power with enhanced residue capture
06/02/2009US7541288 Methods of forming integrated circuit structures using insulator deposition and insulator gap filling techniques
06/02/2009US7541287 Method for machining a semiconductor wafer on both sides in a carrier, carrier, and a semiconductor wafer produced by the method
06/02/2009US7541286 Method for manufacturing semiconductor device using KrF light source
06/02/2009US7541285 Substrate processing apparatus and substrate processing method
06/02/2009US7541284 Includes first ruthenium film that covers surface of substrate and second ruthenium film formed on first, where first film may be deposited by plasma-enhanced ALD (PEALD) process, and second by atomic layer deposition (ALD) process; high density, smooth surface, good adhesiveness, short incubation period
06/02/2009US7541283 Plasma processing method and plasma processing apparatus
06/02/2009US7541282 Methods of forming metal-nitride layers in contact holes
06/02/2009US7541281 Method for manufacturing electronic device
06/02/2009US7541280 Method of foming a micromechanical structure
06/02/2009US7541279 Method for manufacturing semiconductor device
06/02/2009US7541278 Interconnect substrate, semiconductor device, methods of manufacturing the same, circuit board, and electronic equipment
06/02/2009US7541277 Stress relaxation, selective nitride phase removal
06/02/2009US7541276 Methods for forming dual damascene wiring for semiconductor devices using protective via capping layer
06/02/2009US7541275 Method for manufacturing an interconnect
06/02/2009US7541274 Integrated circuit with a reduced pad bump area and the manufacturing method thereof
06/02/2009US7541273 Method for forming bumps
06/02/2009US7541272 Damascene patterning of barrier layer metal for C4 solder bumps
06/02/2009US7541271 MOS transistors having low-resistance salicide gates and a self-aligned contact between them and method of manufacture
06/02/2009US7541270 Methods for forming openings in doped silicon dioxide
06/02/2009US7541269 Method of forming tungsten polymetal gate having low resistance
06/02/2009US7541267 Reversed T-shaped finfet
06/02/2009US7541266 Covert transformation of transistor properties as a circuit protection method
06/02/2009US7541265 Capacitor material for use in circuitized substrates, circuitized substrate utilizing same, method of making said circuitized substrate, and information handling system utilizing said circuitized substrate
06/02/2009US7541264 Temporary wafer bonding method for semiconductor processing
06/02/2009US7541263 Method for providing mixed stacked structures, with various insulating zones and/or electrically conducting zones vertically localized
06/02/2009US7541262 Method for producing semiconductor device
06/02/2009US7541261 Flexible electronics using ion implantation to adhere polymer substrate to single crystal silicon substrate
06/02/2009US7541260 Trench diffusion isolation in semiconductor devices
06/02/2009US7541259 Semiconductor device having a compressed device isolation structure
06/02/2009US7541258 Method of manufacturing semiconductor substrate and method of manufacturing semiconductor device
06/02/2009US7541257 Semiconductor device having three-dimensional construction and method for manufacturing the same
06/02/2009US7541256 Method of fabricating back-illuminated imaging sensors using a bump bonding technique
06/02/2009US7541255 Method for manufacturing semiconductor device
06/02/2009US7541254 Method of manufacturing thin film capacitor
06/02/2009US7541253 Method of forming an integrated resistor
06/02/2009US7541252 Methods of fabricating a semiconductor device including a self-aligned cell diode
06/02/2009US7541251 Wire bond and redistribution layer process
06/02/2009US7541250 Method for forming a self-aligned twin well region with simplified processing
06/02/2009US7541249 Process for producing a base connection of a bipolar transistor
06/02/2009US7541248 Integrated semiconductor device and method of manufacturing thereof
06/02/2009US7541247 Guard ring structures for high voltage CMOS/low voltage CMOS technology using LDMOS (lateral double-diffused metal oxide semiconductor) device fabrication
06/02/2009US7541246 Method of manufacturing semiconductor device
06/02/2009US7541245 Semiconductor device with silicon-film fins and method of manufacturing the same
06/02/2009US7541244 Semiconductor device having a trench gate and method of fabricating the same
06/02/2009US7541243 Methods of forming integrated circuit devices having gate electrodes formed on non-uniformly thick gate insulating layers
06/02/2009US7541242 NROM memory cell, memory array, related devices and methods
06/02/2009US7541241 Method for fabricating memory cell
06/02/2009US7541240 Integration process flow for flash devices with low gap fill aspect ratio
06/02/2009US7541239 Selective spacer formation on transistors of different classes on the same device
06/02/2009US7541238 Inductor formed in an integrated circuit
06/02/2009US7541237 Non-volatile memory cell array having discontinuous source and drain diffusions contacted by continuous bit line conductors and methods of forming
06/02/2009US7541236 Method for manufacturing semiconductor device
06/02/2009US7541235 Method for providing a programmable electrostatic discharge (ESD) protection device
06/02/2009US7541234 Methods of fabricating integrated circuit transistors by simultaneously removing a photoresist layer and a carbon-containing layer on different active areas
06/02/2009US7541233 Semiconductor device and method of manufacturing the same
06/02/2009US7541232 Method for fabrication of devices in a multi-layer structure
06/02/2009US7541231 Integration of SiGe NPN and vertical PNP devices on a substrate
06/02/2009US7541230 Method and apparatus for crystallizing semiconductor with laser beams
06/02/2009US7541229 Thin film transistor and method for fabricating same
06/02/2009US7541228 Semiconductor device, method of manufacturing the same, and method of designing the same
06/02/2009US7541227 Thin film devices and methods for forming the same
06/02/2009US7541226 Manufacturing process of thin film transistor
06/02/2009US7541225 Method of manufacturing a thin film transistor array panel that includes using chemical mechanical polishing of a conductive film to form a pixel electrode connected to a drain electrode
06/02/2009US7541224 Active matrix type display device and method of manufacturing the same
06/02/2009US7541223 Array substrate and liquid crystal display apparatus having the same
06/02/2009US7541222 Wire sweep resistant semiconductor package and manufacturing method therefor
06/02/2009US7541221 Integrated circuit package system with leadfinger support
06/02/2009US7541220 Integrated circuit device having flexible leadframe
06/02/2009US7541219 Integrated metallic contact probe storage device
06/02/2009US7541218 Wafer-level chip package process
06/02/2009US7541217 Stacked chip structure and fabrication method thereof
06/02/2009US7541215 Image sensor and method for manufacturing the same
06/02/2009US7541214 Micro-electro mechanical device made from mono-crystalline silicon and method of manufacture therefore
06/02/2009US7541213 Semiconductor device and manufacturing method thereof
06/02/2009US7541211 Photoelectric conversion device, its manufacturing method, and image pickup device
06/02/2009US7541210 Method for fabricating CMOS image sensor
06/02/2009US7541209 Method of forming a device package having edge interconnect pad
06/02/2009US7541208 Methods for preserving strained semiconductor substrate layers during CMOS processing
06/02/2009US7541207 Light emitting device and method of manufacturing the same
06/02/2009US7541206 Nitride-based semiconductor light-emitting device and method of manufacturing the same
06/02/2009US7541205 Fabrication method of transparent electrode on visible light-emitting diode
06/02/2009US7541204 Method of manufacturing an optical semiconductor element
06/02/2009US7541203 Conductive adhesive for thinned silicon wafers with through silicon vias
06/02/2009US7541202 Connection device and test system
06/02/2009US7541201 Apparatus and methods for determining overlay of structures having rotational or mirror symmetry
06/02/2009US7541200 Treatment of low k films with a silylating agent for damage repair
06/02/2009US7541199 Methods of forming magnetic memory devices including oxidizing and etching magnetic layers
06/02/2009US7541198 Method of forming quantum-mechanical memory and computational devices
06/02/2009US7541138 Evaluation of immersing the resist film in a solvent after the selective exposure step and before the post-exposure baking step followed by development; accuracy; no surface roughness; excellent resist pattern profile; antiswelling agents; minimal deterioration in sensitivity; miniaturization
06/02/2009US7541136 Transparent film configured to give a predetermined phase difference to exposure light passing through that part of the second opening area in which the transparent film is provided relative to exposure light passing through the second surrounding area; focus monitor masks; photolithography; efficiency
06/02/2009US7541134 Antireflective film-forming composition, method for manufacturing the same, and antireflective film and pattern formation method using the same
06/02/2009US7541118 photomasks comprising a non-phase shifting, phase shifting and opaque segemnts, for use in photolithography to produce patterns having a very fine pitch
06/02/2009US7541117 Shifter pattern image transferred to the photoresist film in the shifter pattern image light exposure step does not overlap the trim pattern image transferred to the film in the trim pattern image light exposure step; photoresist film is patterned with a photoresist material remaining in the dark part
06/02/2009US7541094 Etching; photolithography
06/02/2009US7541069 Method and system for coating internal surfaces using reverse-flow cycling
06/02/2009US7541067 depositing a thin film CdS on photovoltaic device; heat transfer from the solar cell absorber layer to minimize buffer layer material particle formation within the supply solution; in the form of rolled foils
06/02/2009US7541061 Vacuum chamber load lock structure and article transport mechanism
06/02/2009US7541058 cost effective producing printed circuit boards; angular reflector on cladding layers capable of transmitting and/or receiving both electrical and optical signals; electrooptics