Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2010
08/17/2010US7776746 Method and apparatus for ultra thin wafer backside processing
08/17/2010US7776745 Method for etching silicon-germanium in the presence of silicon
08/17/2010US7776744 Pitch multiplication spacers and methods of forming the same
08/17/2010US7776743 Method of forming semiconductor devices containing metal cap layers
08/17/2010US7776742 Film-forming method
08/17/2010US7776741 Process for through silicon via filing
08/17/2010US7776740 Method for integrating selective low-temperature ruthenium deposition into copper metallization of a semiconductor device
08/17/2010US7776739 Semiconductor device interconnection contact and fabrication method
08/17/2010US7776738 Method for fabricating a storage electrode of a semiconductor device
08/17/2010US7776737 Reliability of wide interconnects
08/17/2010US7776736 Substrate for electronic device capable of suppressing fluorine atoms exposed at the surface of insulating film from reacting with water and method for processing same
08/17/2010US7776735 Semiconductor device and process for manufacturing the same
08/17/2010US7776734 Barrier layer for fine-pitch mask-based substrate bumping
08/17/2010US7776733 Method for depositing titanium nitride films for semiconductor manufacturing
08/17/2010US7776732 Metal high-K transistor having silicon sidewall for reduced parasitic capacitance, and process to fabricate same
08/17/2010US7776731 Method of removing defects from a dielectric material in a semiconductor
08/17/2010US7776730 Siloxane polymer composition, method of forming a pattern using the same, and method of manufacturing a semiconductor using the same
08/17/2010US7776729 Transistor, method of manufacturing same, etchant for use during manufacture of same, and system containing same
08/17/2010US7776728 Rapid thermal process method and rapid thermal process device
08/17/2010US7776727 Methods of emitter formation in solar cells
08/17/2010US7776726 Semiconductor devices and methods of manufacture thereof
08/17/2010US7776725 Anti-halo compensation
08/17/2010US7776724 Methods of filling a set of interstitial spaces of a nanoparticle thin film with a dielectric material
08/17/2010US7776723 Method of manufacturing an epitaxial semiconductor substrate and method of manufacturing a semiconductor device
08/17/2010US7776722 Manufacturing methods of semiconductor substrate, thin film transistor and semiconductor device
08/17/2010US7776721 Laser processing method for gallium arsenide wafer
08/17/2010US7776720 Program-controlled dicing of a substrate using a pulsed laser
08/17/2010US7776719 Method for manufacturing bonded wafer
08/17/2010US7776718 Method of manufacturing semiconductor substrate with reduced gap size between single-crystalline layers
08/17/2010US7776717 Controlled process and resulting device
08/17/2010US7776716 Method for fabricating a semiconductor on insulator wafer
08/17/2010US7776715 Reverse construction memory cell
08/17/2010US7776714 Method for production of a very thin layer with thinning by means of induced self-support
08/17/2010US7776713 Etching solution, method of surface modification of semiconductor substrate and method of forming shallow trench isolation
08/17/2010US7776712 Method of forming a semiconductor device
08/17/2010US7776710 Manufacturing method of semiconductor wafer having a trench structure and epitaxial layer
08/17/2010US7776709 Cut-and-paste imprint lithographic mold and method therefor
08/17/2010US7776708 System and method for providing a nitride cap over a polysilicon filled trench to prevent formation of a vertical bird's beak structure in the manufacture of a semiconductor device
08/17/2010US7776707 Method for manufacturing dielectric memory
08/17/2010US7776706 Forming SOI trench memory with single-sided buried strap
08/17/2010US7776705 Method for fabricating a thick copper line and copper inductor resulting therefrom
08/17/2010US7776704 Method to build self-aligned NPN in advanced BiCMOS technology
08/17/2010US7776703 Process for manufacturing semiconductor device
08/17/2010US7776702 Method of fabricating high integrated semiconductor apparatus, and semiconductor apparatus fabricated thereby
08/17/2010US7776701 Metal oxynitride as a pFET material
08/17/2010US7776700 LDMOS device and method
08/17/2010US7776698 Selective formation of silicon carbon epitaxial layer
08/17/2010US7776697 Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same
08/17/2010US7776696 Method to obtain multiple gate thicknesses using in-situ gate etch mask approach
08/17/2010US7776695 Semiconductor device structure having low and high performance devices of same conductive type on same substrate
08/17/2010US7776694 Method for fabricating a transistor having vertical channel
08/17/2010US7776693 Method of manufacturing semiconductor apparatus
08/17/2010US7776691 Semiconductor memory device and manufacturing method for semiconductor device
08/17/2010US7776690 Method of forming a contact on a semiconductor device
08/17/2010US7776689 Semiconductor device and method of fabricating the same
08/17/2010US7776688 Use of a polymer spacer and Si trench in a bitline junction of a flash memory cell to improve TPD characteristics
08/17/2010US7776687 Semiconductor device having a gate contact structure capable of reducing interfacial resistance and method of forming the same
08/17/2010US7776686 Method of fabricating a non-volatile memory element including nitriding and oxidation of an insulating film
08/17/2010US7776685 Copolymers, polymer resin composition for buffer layer method of forming a pattern using the same and method of manufacturing a capacitor using the same
08/17/2010US7776684 Increasing the surface area of a memory cell capacitor
08/17/2010US7776683 Integrated circuit fabrication
08/17/2010US7776682 Ordered porosity to direct memory element formation
08/17/2010US7776681 Semiconductor device and method for manufacturing the same
08/17/2010US7776680 Complementary metal oxide semiconductor device with an electroplated metal replacement gate
08/17/2010US7776679 Method for forming silicon wells of different crystallographic orientations
08/17/2010US7776678 Thermally stable BiCMOS fabrication method and bipolar junction transistors formed according to the method
08/17/2010US7776677 Method of forming an EEPROM device and structure therefor
08/17/2010US7776676 Fabricating method of complementary metal-oxide-semiconductor (CMOS) image sensor including p type gate structure
08/17/2010US7776675 Method for forming a reduced resistivity poly gate and related structure
08/17/2010US7776674 Hybrid strained orientated substrates and devices
08/17/2010US7776673 Method of manufacturing semiconductor device
08/17/2010US7776672 Semiconductor device and manufacturing method thereof
08/17/2010US7776671 Inductor for semiconductor device and method of fabricating the same
08/17/2010US7776670 Silicon thin-film and method of forming silicon thin-film
08/17/2010US7776669 Thin film transistor and method of fabricating the same
08/17/2010US7776668 Stripper solution and method for manufacturing liquid crystal display using the same
08/17/2010US7776667 Semiconductor device and manufacturing method thereof, liquid crystal television system, and EL television system
08/17/2010US7776666 Thin film transistor and method of manufacturing thin film transistor
08/17/2010US7776665 Semiconductor device and manufacturing method thereof
08/17/2010US7776664 Method of manufacturing semiconductor device
08/17/2010US7776663 Semiconductor display devices
08/17/2010US7776662 TFT LCD array substrate and manufacturing method thereof
08/17/2010US7776661 Nano-electromechanical circuit using co-planar transmission line
08/17/2010US7776660 Manufacturing method of a semiconductor device
08/17/2010US7776659 Semiconductor device manufacturing method
08/17/2010US7776658 Compact co-packaged semiconductor dies with elevation-adaptive interconnection plates
08/17/2010US7776657 Chip package thermal interface materials with dielectric obstructions for body-biasing, methods of using same, and systems containing same
08/17/2010US7776656 Method for manufacturing semiconductor device
08/17/2010US7776655 Semiconductor device and method of forming conductive pillars in recessed region of peripheral area around the device for electrical interconnection to other devices
08/17/2010US7776654 Method of producing electronic apparatus
08/17/2010US7776653 Controlling flip-chip techniques for concurrent ball bonds in semiconductor devices
08/17/2010US7776652 Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice
08/17/2010US7776651 Method for compensating for CTE mismatch using phase change lead-free super plastic solders
08/17/2010US7776650 Method for fabricating a flip chip system in package
08/17/2010US7776649 Method for fabricating wafer level chip scale packages
08/17/2010US7776648 High thermal performance packaging for circuit dies
08/17/2010US7776647 Semiconductor components and methods of fabrication with circuit side contacts, conductive vias and backside conductors
08/17/2010US7776646 Organic field-effect transistor and method of making same based on polymerizable self-assembled monolayers
08/17/2010US7776644 Phase change memory cell and method and system for forming the same
08/17/2010US7776643 Solid state image pickup device and its manufacture method