Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2010
08/24/2010US7781346 Methods of forming patterns and capacitors for semiconductor devices using the same
08/24/2010US7781345 Method of manufacturing imprint substrate and imprinting method
08/24/2010US7781344 Method for manufacturing a semiconductor device by selective etching
08/24/2010US7781343 Semiconductor substrate having a protection layer at the substrate back side
08/24/2010US7781342 between heat-processing and etching steps, supplying a fluorine-based liquid ( trifluoroethanol/2.2.2-/) to the heat processed resist pattern to form a protection film with a high fluorine density on a surface of the resist pattern; development, etching
08/24/2010US7781341 Method of manufacturing semiconductor device
08/24/2010US7781340 Method and system for etching high-k dielectric materials
08/24/2010US7781339 Method of fabricating semiconductor interconnections
08/24/2010US7781338 Semiconductor device manufacturing method and semiconductor device
08/24/2010US7781337 Forming method of silicide film
08/24/2010US7781336 Semiconductor device including ruthenium electrode and method for fabricating the same
08/24/2010US7781335 Method for fabricating semiconductor device
08/24/2010US7781334 Method of manufacturing a semiconductor device with through-chip vias
08/24/2010US7781333 Semiconductor device with gate structure and method for fabricating the semiconductor device
08/24/2010US7781332 Methods to mitigate plasma damage in organosilicate dielectrics using a protective sidewall spacer
08/24/2010US7781331 Method for producing electrically conductive bushings through non-conductive or semiconductive substrates
08/24/2010US7781330 Method of fabricating a semiconductor device comprising high and low density patterned contacts
08/24/2010US7781329 Reducing leakage in dielectric materials including metal regions including a metal cap layer in semiconductor devices
08/24/2010US7781328 Multilayer substrate
08/24/2010US7781327 considerable etching of the diffusion barrier material at the via bottom, while not damaging exposed dielectric elsewhere on the wafer;
08/24/2010US7781326 Formation of a tantalum-nitride layer
08/24/2010US7781325 Copper pillar tin bump on semiconductor chip and method of forming the same
08/24/2010US7781324 Method of producing wire-connection structure, and wire-connection structure
08/24/2010US7781323 Semiconductor device and manufacturing method thereof
08/24/2010US7781322 Nickel alloy salicide transistor structure and method for manufacturing same
08/24/2010US7781321 Electroless metal deposition for dual work function
08/24/2010US7781320 Method for fabricating a semiconductor device by considering the extinction coefficient during etching of an interlayer insulating film
08/24/2010US7781319 Method of manufacturing semiconductor device
08/24/2010US7781318 Semiconductor device and method of manufacturing the same
08/24/2010US7781317 Method of non-catalytic formation and growth of nanowires
08/24/2010US7781316 Methods of manufacturing metal-silicide features
08/24/2010US7781315 Finfet field effect transistor insulated from the substrate
08/24/2010US7781314 Nitride semiconductor device manufacturing method
08/24/2010US7781313 Method for manufacturing silicon wafer
08/24/2010US7781312 Silicon carbide devices and method of making
08/24/2010US7781311 System and method for filling vias
08/24/2010US7781310 Semiconductor die singulation method
08/24/2010US7781309 Method for manufacturing direct bonded SOI wafer and direct bonded SOI wafer manufactured by the method
08/24/2010US7781308 Method for manufacturing SOI substrate
08/24/2010US7781306 Semiconductor substrate and method for manufacturing the same
08/24/2010US7781305 Controlled cleaving process
08/24/2010US7781304 Semiconductor device having trench isolation region and methods of fabricating the same
08/24/2010US7781303 Method for preparing a shallow trench isolation
08/24/2010US7781302 Methods of fabricating semiconductor devices having isolation regions formed from annealed oxygen ion implanted regions
08/24/2010US7781301 Method of fabricating semiconductor device
08/24/2010US7781300 Method for producing mixed stacked structures, different insulating areas and/or localised vertical electrical conducting areas
08/24/2010US7781299 Leadframe semiconductor package stand and method for making the same
08/24/2010US7781298 Methods for fabricating a capacitor
08/24/2010US7781297 Semiconductor device and method of fabricating the same
08/24/2010US7781296 Integrated circuit comprising a capacitor with metal electrodes and process for fabricating such a capacitor
08/24/2010US7781295 System and method for providing a single deposition emitter/base in a bipolar junction transistor
08/24/2010US7781294 Method for producing an integrated circuit including a semiconductor
08/24/2010US7781293 Semiconductor device and method of fabricating the same including trenches of different aspect ratios
08/24/2010US7781292 High power device isolation and integration
08/24/2010US7781291 Semiconductor device and method for fabricating the same
08/24/2010US7781290 Complementary metal-oxide semiconductor (CMOS) devices including a thin-body channel and dual gate dielectric layers and methods of manufacturing the same
08/24/2010US7781289 Method for fabricating higher quality thicker gate oxide in a non-volatile memory cell and associated circuits
08/24/2010US7781288 Semiconductor structure including gate electrode having laterally variable work function
08/24/2010US7781287 Methods of manufacturing vertical channel semiconductor devices
08/24/2010US7781286 Method for fabricating non-volatile storage with individually controllable shield plates between storage elements
08/24/2010US7781285 Semiconductor device having vertical transistor and method of fabricating the same
08/24/2010US7781284 Semiconductor device and method of manufacturing the same
08/24/2010US7781283 Split-gate DRAM with MuGFET, design structure, and method of manufacture
08/24/2010US7781282 Shared contact structure, semiconductor device and method of fabricating the semiconductor device
08/24/2010US7781281 Method of fabricating self-aligned contact pad using chemical mechanical polishing process
08/24/2010US7781280 Semiconductor device with capacitor and fuse and its manufacture method
08/24/2010US7781279 Method for manufacturing a memory
08/24/2010US7781278 CMOS devices having channel regions with a V-shaped trench and hybrid channel orientations, and method for forming the same
08/24/2010US7781277 Selective uniaxial stress relaxation by layout optimization in strained silicon on insulator integrated circuit
08/24/2010US7781276 Methods of forming CMOS integrated circuits that utilize insulating layers with high stress characteristics to improve NMOS and PMOS transistor carrier mobilities
08/24/2010US7781275 Method of manufacturing a flash memory device
08/24/2010US7781274 Multi-gate field effect transistor and method for manufacturing the same
08/24/2010US7781273 Semiconductor structure with multiple fins having different channel region heights and method of forming the semiconductor structure
08/24/2010US7781272 Method for manufacturing a pixel structure of a liquid crystal display
08/24/2010US7781271 Process for laser processing and apparatus for use in the same
08/24/2010US7781270 Method for fabricating electronic devices integrated on a single substrate
08/24/2010US7781269 Triangle two dimensional complementary patterning of pillars
08/24/2010US7781268 Array substrate and display panel
08/24/2010US7781267 Enclosed nanotube structure and method for forming
08/24/2010US7781266 Methods and apparatus for improved thermal performance and electromagnetic interference (EMI) shielding in leadframe integrated circuit (IC) packages
08/24/2010US7781265 DFN semiconductor package having reduced electrical resistance
08/24/2010US7781264 Method for fabricating flip-chip semiconductor package with lead frame as chip carrier
08/24/2010US7781263 Systems, devices, and methods for semiconductor device temperature management
08/24/2010US7781262 Method for producing semiconductor device and semiconductor device
08/24/2010US7781261 Integrated circuit package system with offset stacking and anti-flash structure
08/24/2010US7781260 Methods of forming nano-coatings for improved adhesion between first level interconnects and epoxy under-fills in microelectronic packages and structures formed thereby
08/24/2010US7781259 Method of manufacturing a semiconductor using a rigid substrate
08/24/2010US7781258 Manufacturing method of semiconductor device
08/24/2010US7781257 Electrical switching device and method of embedding catalytic material in a diamond substrate
08/24/2010US7781256 Semiconductor-on-diamond devices and associated methods
08/24/2010US7781255 Donor sheet and method of manufacturing donor sheet and organic thin film transistor
08/24/2010US7781254 Nanoporous fullerene layers and their use in organic photovoltaics
08/24/2010US7781253 Image sensor and method of manufacturing the same
08/24/2010US7781252 Method of manufacturing CMOS image sensor
08/24/2010US7781251 Image sensor and method for fabricating the same
08/24/2010US7781250 Wafer level chip size package for MEMS devices and method for fabricating the same
08/24/2010US7781249 MEMS process and device
08/24/2010US7781248 Method of manufacturing nitride semiconductor light emitting device and nitride semiconductor light emitting device manufactured using the method
08/24/2010US7781247 Method for producing Group III-Group V vertical light-emitting diodes
08/24/2010US7781246 Method of manufacturing vertical light emitting device