Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2010
10/20/2010CN101404261B Triode and manufacturing method thereof
10/20/2010CN101385132B Semiconductor device
10/20/2010CN101383323B Method of forming a contact plug of a semiconductor device
10/20/2010CN101286462B Sealing apparatus, sealing method and encapsulation method of integrated circuit chip
10/20/2010CN101271280B Lithography method for forming a circuit pattern
10/20/2010CN101256988B Semiconductor device with multi-layered wiring arrangement including reinforcing patterns
10/20/2010CN101236968B MOS device and its making method
10/20/2010CN101236927B Self-aligning contact window and its making method
10/20/2010CN101228616B Method for controlling dislocation positions in silicon germanium buffer layers and product
10/20/2010CN101192625B Semiconductor device and its manufacture method
10/20/2010CN101158539B Rotating cleaning dry-type groove
10/20/2010CN101098981B Winding plasma cvd apparatus
10/20/2010CN101086957B Etching apparatus for substrates
10/20/2010CN101085653B Wafer storage container
10/19/2010USRE41842 Methods of forming electrical interconnects on integrated circuit substrates using selective slurries
10/19/2010USRE41841 Method for making a silicon substrate comprising a buried thin silicon oxide film
10/19/2010USRE41826 Semiconductor device
10/19/2010US7818709 Circuit-pattern-data correction method and semiconductor-device manufacturing method
10/19/2010US7818702 Structure incorporating latch-up resistant semiconductor device structures on hybrid substrates
10/19/2010US7818085 System for controlling the processing of an integrated circuit chip assembly line
10/19/2010US7817458 Hybrid circuit having nanotube memory cells
10/19/2010US7817261 Method of apparatus for detecting particles on a specimen
10/19/2010US7817249 Exposure method and apparatus, and device producing method using two light beams to correct non-rotationally symmetric aberration
10/19/2010US7817245 Lithographic apparatus and device manufacturing method
10/19/2010US7817243 Vibration isolation system
10/19/2010US7817242 Exposure method and device manufacturing method, exposure apparatus, and program
10/19/2010US7817229 Transflective type LCD and method for manufacturing the same
10/19/2010US7817175 Laser induced thermal imaging apparatus and fabricating method of organic light emitting diode using the same
10/19/2010US7816935 Test apparatus
10/19/2010US7816863 Light emitting device and method for manufacturing the same
10/19/2010US7816793 Apparatus for facilitating proximity communication between chips
10/19/2010US7816787 Method of forming low stress multi-layer metallurgical structures and high reliable lead free solder termination electrodes
10/19/2010US7816777 Semiconductor-element mounting substrate, semiconductor device, and electronic equipment
10/19/2010US7816776 Stacked semiconductor device and method of forming serial path thereof
10/19/2010US7816774 Flexible semiconductor device and identification label
10/19/2010US7816764 Method of controlling stress in gallium nitride films deposited on substrates
10/19/2010US7816760 Semiconductor structure including laminated isolation region
10/19/2010US7816759 Integrated circuit including isolation regions substantially through substrate
10/19/2010US7816758 Integrated circuit having laterally dielectrically isolated active regions above an electrically contacted buried material, and method for producing the same
10/19/2010US7816756 Power semiconductor device
10/19/2010US7816753 IrOx nanostructure electrode neural interface optical device
10/19/2010US7816750 Thin semiconductor die packages and associated systems and methods
10/19/2010US7816746 Spin-tunnel transistor and magnetic reproducing head
10/19/2010US7816736 Method of manufacturing a semiconductor device
10/19/2010US7816723 Semiconductor memory array of floating gate memory cells with program/erase and select gates
10/19/2010US7816721 Transmission/reception semiconductor device with memory element and antenna on same side of conductive adhesive
10/19/2010US7816719 Nonvolatile magnetic memory device and photomask
10/19/2010US7816718 Interconnect for a GMR memory cells and an underlying conductive layer
10/19/2010US7816717 Semiconductor memory device
10/19/2010US7816716 Semiconductor ferroelectric device, manufacturing method for the same, and electronic device
10/19/2010US7816706 Power semiconductor device
10/19/2010US7816705 Method of fabricating vertical structure LEDs
10/19/2010US7816704 Method for packaging a light emitting device including a metal reflection layer and a metal heat dissipation layer
10/19/2010US7816703 Light-emitting diode device and manufacturing method thereof
10/19/2010US7816696 Nitride semiconductor device and method for manufacturing same
10/19/2010US7816688 Semiconductor device and production method therefor
10/19/2010US7816684 Light emitting display device and method of fabricating the same
10/19/2010US7816681 Capacitive gas sensor and method of fabricating the same
10/19/2010US7816678 Organic light emitting display with single crystalline silicon TFT and method of fabricating the same
10/19/2010US7816664 Defect reduction by oxidation of silicon
10/19/2010US7816661 Air cell thermal isolation for a memory array formed of a programmable resistive material
10/19/2010US7816491 Ordered biological nanostructures formed from chaperonin polypeptides
10/19/2010US7816487 surface mount; a thermosetting cyanate ester resin, a hardener, and a bis(phenylamine) reactive diluent; void free interfaces between the film, substrate and die;
10/19/2010US7816313 removes residue formed by ashing treatment after dry etching in step of forming, on substrate surface, wiring of aluminum, copper, tungsten, and alloy thereof, inorganic acid (sulfuric, nitric, hydrochloric, and/or phosphoric), hydrofluoric acid, ammonium fluoride and/or ammonium hydrogen fluoride
10/19/2010US7816284 Method of forming pattern on group III nitride semiconductor substrate and method of manufacturing group III nitride semiconductor light emitting device
10/19/2010US7816283 Method of depositing a higher permittivity dielectric film
10/19/2010US7816282 Method for forming SrTiO3 film
10/19/2010US7816281 Method for manufacturing a semiconductor device
10/19/2010US7816280 Semiconductor device, semiconductor wafer, and methods of producing the same device and wafer
10/19/2010US7816279 Semiconductor device and method for manufacturing the same
10/19/2010US7816278 In-situ hybrid deposition of high dielectric constant films using atomic layer deposition and chemical vapor deposition
10/19/2010US7816277 Method for forming deposit, droplet ejection apparatus, electro-optic device, and liquid crystal display
10/19/2010US7816276 Substrate treatment system, substrate treatment method, and computer readable storage medium
10/19/2010US7816275 Gate patterning of nano-channel devices
10/19/2010US7816274 Methods for normalizing strain in a semiconductor device
10/19/2010US7816273 Technique for removing resist material after high dose implantation in a semiconductor device
10/19/2010US7816272 Process of cleaning a semiconductor manufacturing system and method of manufacturing a semiconductor device
10/19/2010US7816271 Methods for forming contacts for dual stress liner CMOS semiconductor devices
10/19/2010US7816270 Method of forming minute patterns in semiconductor device using double patterning
10/19/2010US7816269 Plasma deposition apparatus and method for making polycrystalline silicon
10/19/2010US7816268 Semiconductor device and manufacturing method of semiconductor device
10/19/2010US7816267 Method for forming inlaid interconnect
10/19/2010US7816266 Copper diffusion barrier
10/19/2010US7816265 Method for forming vias in a substrate
10/19/2010US7816264 Wafer processing method
10/19/2010US7816263 Method for manufacturing thin film transistor
10/19/2010US7816262 Method and algorithm for random half pitched interconnect layout with constant spacing
10/19/2010US7816261 MOSFETS comprising source/drain recesses with slanted sidewall surfaces, and methods for fabricating the same
10/19/2010US7816260 Method for fabricating semiconductor device
10/19/2010US7816259 Method of forming a contact in a semiconductor device
10/19/2010US7816258 Method for manufacturing electro-optic device substrate with titanium silicide regions formed within
10/19/2010US7816257 Methods of fabricating semiconductor devices including contact plugs having laterally extending portions
10/19/2010US7816256 Process for improving the reliability of interconnect structures and resulting structure
10/19/2010US7816255 Methods of forming a semiconductor device including a diffusion barrier film
10/19/2010US7816254 Film forming method, fabrication process of semiconductor device, computer-readable recording medium and sputtering apparatus
10/19/2010US7816253 Surface treatment of inter-layer dielectric
10/19/2010US7816252 Method for forming bumps on under bump metallurgy
10/19/2010US7816251 Formation of circuitry with modification of feature height
10/19/2010US7816250 Composite solder TIM for electronic package
10/19/2010US7816249 containing antimony, germanium, and tin; chips; mounting heat sink plate on back surface of insulative substrate by soldering, in hydrogen reducing furnace; heat resistance
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