Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2010
10/14/2010WO2010090789A3 Methods of forming memory cells
10/14/2010WO2010090693A3 Ion implanted substrate having capping layer and method
10/14/2010WO2010088267A3 Method and apparatus for etching
10/14/2010WO2010086745A8 Method of etching lanthanum-containing oxide layers
10/14/2010WO2010085679A3 Systems and methods for detecting defects on a wafer
10/14/2010WO2010082781A3 Trimming device and a wafer on which the trimming device is formed
10/14/2010WO2010082755A3 Evaporation apparatus, thin film depositing apparatus and method for feeding source material of the same
10/14/2010WO2010082109A3 Stray coating prevention device, coating chamber device for coating substrates, and method of coating
10/14/2010WO2010081127A3 Adhesives and binders for electro-optic displays
10/14/2010WO2010081009A3 Systems, apparatus and methods for making an electrical connection to a robot and electrical end effector thereof
10/14/2010WO2010080654A3 Profile and cd uniformity control by plasma oxidation treatment
10/14/2010WO2010080595A3 Illumination methods and systems for laser scribe detection and alignment in thin film solar cell fabrication
10/14/2010WO2010075234A3 Method of patterning conductive layer and devices made thereby
10/14/2010WO2010072826A3 Method for separating a layer system comprising a wafer
10/14/2010WO2010071834A3 Method to enhance charge trapping
10/14/2010WO2010070562A3 Device for treating disc-like articles and method for oparating same
10/14/2010WO2010065966A3 High rate deposition of thin films with improved barrier layer properties
10/14/2010WO2010013194A3 Orientation of an electronic cmos structure with respect to a buried structure in the case of a bonded and thinned-back stack of semiconductor wafers
10/14/2010WO2009110226A9 High frequency antenna unit and plasma processing apparatus
10/14/2010WO2009097150A3 Solution-processed high mobility inorganic thin-film transistors
10/14/2010WO2009035419A3 An apparatus and method for dicing an ic substrate
10/14/2010US20100262276 Substrate transport apparatus and substrate transport method
10/14/2010US20100261355 Method for forming a high quality insulation layer on a semiconductor device
10/14/2010US20100261354 Gasket with positioning feature for clamped monolithic showerhead electrode
10/14/2010US20100261353 Wafer planarity control between pattern levels
10/14/2010US20100261352 Method for low-k dielectric etch with reduced damage
10/14/2010US20100261351 Spacer Linewidth Control
10/14/2010US20100261350 Methods of forming thin metal-containing films by chemical phase deposition
10/14/2010US20100261349 Uv treatment for carbon-containing low-k dielectric repair in semiconductor processing
10/14/2010US20100261348 Method for fabricating semiconductor package substrate having different thicknesses between wire bonding pad and ball pad
10/14/2010US20100261347 Semiconductor device and method of forming the same8027
10/14/2010US20100261346 circuit manufacturing and design techniques for reference plane voids with strip segment
10/14/2010US20100261345 Method of manufacturing a semiconductor device
10/14/2010US20100261344 Active area bonding compatible high current structures
10/14/2010US20100261343 Manufacture method for semiconductor device with bristled conductive nanotubes
10/14/2010US20100261342 Semiconductor device containing a buried threshold voltage adjustment layer and method of forming
10/14/2010US20100261341 Method for manufacturing epitaxial wafer
10/14/2010US20100261340 Cluster tool for leds
10/14/2010US20100261339 Single crystal growth on a mis-matched substrate
10/14/2010US20100261338 Nanostructures, methods of depositing nanostructures and devices incorporating the same
10/14/2010US20100261337 Method for manufacturing dies formed with a dielectric layer
10/14/2010US20100261336 Chip manufacturing method
10/14/2010US20100261335 Process for wet singulation using a dicing moat structure
10/14/2010US20100261334 Semiconductor device and method for manufacturing the same
10/14/2010US20100261333 Silicon carbide semiconductor device and manufacturing method therefor
10/14/2010US20100261332 Wafer cleaning method and wafer bonding method using the same
10/14/2010US20100261331 Methods Of Forming A Plurality Of Capacitors
10/14/2010US20100261330 Method of manufacturing nonvolatile storage device
10/14/2010US20100261329 Memory device having wide area phase change element and small electrode contact area
10/14/2010US20100261328 Method of manufacturing a semiconductor device having fin-field effect transistor
10/14/2010US20100261327 Non-volatile semiconductor memory device and method of manufacturing the same
10/14/2010US20100261326 Isolated-nitride-region non-volatile memory cell and fabrication method
10/14/2010US20100261325 Method for manufacturing semiconductor device having a dual gate insulation layer
10/14/2010US20100261324 Trap-charge non-volatile switch connector for programmable logic
10/14/2010US20100261323 Method of forming metal-oxide-semiconductor transistor
10/14/2010US20100261322 Array substrate and method of manufacturing the same
10/14/2010US20100261321 Method for manufacturing flexible semiconductor device
10/14/2010US20100261320 Method of manufacturing a semiconductor device
10/14/2010US20100261319 N-type carrier enhancement in semiconductors
10/14/2010US20100261318 3d chip-stack with fuse-type through silicon via
10/14/2010US20100261317 Offset non-volatile storage
10/14/2010US20100261316 Semiconductor device with surface mounting terminals
10/14/2010US20100261315 Wafer level packaging method
10/14/2010US20100261314 Thermosetting die bonding film
10/14/2010US20100261313 Semiconductor package and method of packaging semiconductor devices
10/14/2010US20100261312 Manufacturing method of semiconductor integrated circuit device
10/14/2010US20100261311 Method of manufacturing a semiconductor device
10/14/2010US20100261310 Via First Plus Via Last Technique for IC Interconnect
10/14/2010US20100261309 Method of manufacturing semiconductor device
10/14/2010US20100261304 Solution-based process for making inorganic materials
10/14/2010US20100261302 Dry cleaning of silicon surface for solar cell applications
10/14/2010US20100261301 Compound semiconductor light-emitting device
10/14/2010US20100261300 Method for separating substrate from semiconductor layer
10/14/2010US20100261299 Packaging process of light emitting diode
10/14/2010US20100261298 Curvature reduction for semiconductor wafers
10/14/2010US20100261297 Remote chip attachment
10/14/2010US20100261296 Semiconductor device and manufacturing method thereof
10/14/2010US20100261295 High performance MTJ element for STT-RAM and method for making the same
10/14/2010US20100261294 Manufacturing method of semiconductor device
10/14/2010US20100261121 Pattern forming method
10/14/2010US20100261102 Mask and manufacturing method of a semiconductor device and a thin film transistor array panel using the mask
10/14/2010US20100261099 Photomask blank and photomask making method
10/14/2010US20100261095 Methods, Photomasks and Methods of Fabricating Photomasks for Improving Damascene Wire Uniformity Without Reducing Performance
10/14/2010US20100260745 Methods of using and constructing nanosensor platforms
10/14/2010US20100260589 Substrate supporting means having wire and apparatus using the same
10/14/2010US20100260227 Semiconductor laser apparatus and fabrication method thereof
10/14/2010US20100260222 Semiconductor layer, method of manufacturing the same, laser diode, and method of manufacturing the same
10/14/2010US20100259991 Nonvolatile memory cell and method for producing the same
10/14/2010US20100259965 High speed otp sensing scheme
10/14/2010US20100259960 Three-Dimensional Array of Re-Programmable Non-Volatile Memory Elements Having Vertical Bit Lines
10/14/2010US20100259924 Lighting Apparatus Having Multiple Light-Emitting Diodes With Individual Light-Conversion Layers
10/14/2010US20100259857 Integrated circuit including esd device
10/14/2010US20100259715 Active matrix substrate, method for manufacturing same, and liquid crystal display apparatus
10/14/2010US20100259548 Semiconductor device
10/14/2010US20100259520 Display panel, display apparatus having the same, and method of manufacturing the same
10/14/2010US20100258955 Semiconductor device and method of manufacturing the same
10/14/2010US20100258951 Assembling substrates that can form 3-d structures
10/14/2010US20100258950 Package with semiconductor device and integrated circuit mounted therein and method for manufacturing such package
10/14/2010US20100258949 Reduced Susceptibility To Electrostatic Discharge During 3D Semiconductor Device Bonding and Assembly
10/14/2010US20100258948 Semiconductor Wafer and Method of Manufacturing the Same and Method of Manufacturing Semiconductor Device
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