Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/2011
04/21/2011US20110092033 Nonvolatile semiconductor memory and process of producing the same
04/21/2011US20110092032 Manufacturing method of semiconductor device
04/21/2011US20110092031 Efficient interconnect structure for electrical fuse applications
04/21/2011US20110092030 System comprising a semiconductor device and structure
04/21/2011US20110092029 SRAM Cell with Different Crystal Orientation than Associated Logic
04/21/2011US20110092028 Lead frame and method of manufacturing the same
04/21/2011US20110092027 Integrated circuit package having a castellated heatspreader
04/21/2011US20110092026 Fluorination pre-treatment of heat spreader attachment indium thermal interface material
04/21/2011US20110092025 Ic card and booking-account system using the ic card
04/21/2011US20110092024 Stacked semiconductor package and method for manufacturing the same
04/21/2011US20110092023 Package structure of photodiode and forming method thereof
04/21/2011US20110092022 Semiconductor device and fabrication method thereof
04/21/2011US20110092021 Method for manufacturing package system incorporating flip-chip assembly
04/21/2011US20110092020 Method for producing electronic part package
04/21/2011US20110092019 Method for Stacked Contact with Low Aspect Ratio
04/21/2011US20110092018 Wafer level packaged mems device
04/21/2011US20110092017 Semiconductor device and manufacturing method the same
04/21/2011US20110092016 Method of treating semiconductor element
04/21/2011US20110092009 Package, in particular for mems devices and method of making same
04/21/2011US20110092006 Method of fabricating display device using plastic substrate
04/21/2011US20110092000 Method for manufacturing and testing an integrated electronic circuit
04/21/2011US20110091999 Adapter board and method for manufacturing same, probe card, method for inspecting semiconductor wafer, and method for manufacturing semiconductor device
04/21/2011US20110091998 Semiconductor device including ferroelectric capacitor
04/21/2011US20110091819 Method for forming pattern
04/21/2011US20110091811 Double-layered patternable adhesive film, method of forming the same, and method of forming patternable adhesive layer using the same
04/21/2011US20110091731 Semiconductor thin films formed from group iv nanoparticles
04/21/2011US20110091640 Non-shrinking ceramic substrate and method of manufacturing the same
04/21/2011US20110090741 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell
04/21/2011US20110090737 3d non-volatile memory device and method for operating and fabricating the same
04/21/2011US20110090722 Voltage converter
04/21/2011US20110090662 Method and apparatus for improving power noise of ball grid array package
04/21/2011US20110090613 Apparatus and method for substrate clamping in a plasma chamber
04/21/2011US20110090605 Semiconductor integrated circuit
04/21/2011US20110090473 Lithographic apparatus
04/21/2011US20110090462 Laser illumination device, illumination method, semiconductor element manufacturing method, projection display device, and image display method using the projection display device
04/21/2011US20110090445 Display substrate, method of manufacturing the display substrate and display apparatus having the display substrate
04/21/2011US20110090209 Electronic device and electronic apparatus
04/21/2011US20110089995 Graphene device and method of manufacturing the same
04/21/2011US20110089972 Scalable non-blocking switching network for programmable logic
04/21/2011US20110089967 Mems probe card and manufacturing method thereof
04/21/2011US20110089813 Active matrix electroluminescence device having a metallic protective layer and method for fabricating the same
04/21/2011US20110089811 Method for fabricating a semiconductor device
04/21/2011US20110089577 Method and structure for bonding flip chip
04/21/2011US20110089573 Semiconductor device and manufacturing method thereof
04/21/2011US20110089572 Method for fabricating through substrate vias
04/21/2011US20110089570 Multi-Layer Connection Cell
04/21/2011US20110089569 Multilayer wiring, method for placing dummy wiring in multilayer wiring, semiconductor device, and semiconductor device manufacturing method
04/21/2011US20110089568 Power semiconductor device and manufacturing method therefor
04/21/2011US20110089566 Wire bonding structure and method that eliminates special wire bondable finish and reduces bonding pitch on substrates
04/21/2011US20110089565 Semiconductor Device and Electronic Apparatus Equipped with the Semiconductor Device
04/21/2011US20110089564 Adhesive on wire stacked semiconductor package
04/21/2011US20110089563 Method for manufacturing semiconductor device and semiconductor device
04/21/2011US20110089559 Method and installation for producing a semiconductor device, and semiconductor device
04/21/2011US20110089558 Semiconductor device and a manufacturing method thereof
04/21/2011US20110089557 Area reduction for die-scale surface mount package chips
04/21/2011US20110089555 Area reduction for surface mount package chips
04/21/2011US20110089554 Integrated circuit packaging system with cavity and method of manufacture thereof
04/21/2011US20110089552 Integrated circuit packaging system with package-on-package stacking and method of manufacture thereof
04/21/2011US20110089550 Production device, production method, test apparatus and integrated circuit package
04/21/2011US20110089548 Semiconductor device and manufacturing method thereof
04/21/2011US20110089547 Methods and devices for manufacturing cantilever leads in a semiconductor package
04/21/2011US20110089546 Multiple leadframe package
04/21/2011US20110089545 Apparatus and method configured to lower thermal stresses
04/21/2011US20110089544 Package, manufacturing method thereof, and semiconductor device
04/21/2011US20110089542 Area reduction for electrical diode chips
04/21/2011US20110089541 Area reduction for electrical diode chips
04/21/2011US20110089538 Low etch pit density (epd) semi-insulating iii-v wafers
04/21/2011US20110089537 Growing process for group iii nitride elements
04/21/2011US20110089531 Interposer Based Monolithic Microwave Integrate Circuit (iMMIC)
04/21/2011US20110089529 Open Cavity Leadless Surface Mountable Package for High Power RF Applications
04/21/2011US20110089526 Integrated Circuit with Multi Recessed Shallow Trench Isolation
04/21/2011US20110089524 Semiconductor device and method of manufacturing the same
04/21/2011US20110089522 Semiconductor device and method of manufacturing the same
04/21/2011US20110089520 GROWTH OF MONOCRYSTALLINE GeN ON A SUBSTRATE
04/21/2011US20110089513 Semiconductor device and method of manufacturing a semiconductor device
04/21/2011US20110089511 Magnetic Random Access Memory (MRAM) Manufacturing Process for a Small Magnetic Tunnel Junction (MTJ) Design with a Low Programming Current Requirement
04/21/2011US20110089507 Novel bit line preparation method in MRAM fabrication
04/21/2011US20110089506 Intrusion protection using stress changes
04/21/2011US20110089505 Method for manufacturing a sensor component without passivation, and a sensor component
04/21/2011US20110089504 Mems process and device
04/21/2011US20110089503 Semiconductor device and method of fabricating the semiconductor device
04/21/2011US20110089502 Multi-layer gate dielectric
04/21/2011US20110089501 Tunable Stressed Polycrystalline Silicon on Dielectrics in an Integrated Circuit
04/21/2011US20110089499 Structure and method for manufacturing asymmetric devices
04/21/2011US20110089498 Integration of low and high voltage cmos devices
04/21/2011US20110089497 Semiconductor device having nickel silicide layer
04/21/2011US20110089496 Semiconductor device and production method
04/21/2011US20110089495 Application of cluster beam implantation for fabricating threshold voltage adjusted fets
04/21/2011US20110089493 Finfet method and device
04/21/2011US20110089492 High voltage semiconductor device with JFET regions containing dielectrically isolated junctions and method of fabricating the same
04/21/2011US20110089490 Method for fabricating a MOS transistor with reduced channel length variation and related structure
04/21/2011US20110089488 Power Device with Improved Edge Termination
04/21/2011US20110089486 Super-high density trench mosfet
04/21/2011US20110089485 Split gate semiconductor device with curved gate oxide profile
04/21/2011US20110089484 Method and system for metal gate formation with wider metal gate fill margin
04/21/2011US20110089483 Method of forming a power semiconductor device and power semiconductor device
04/21/2011US20110089481 Mos transistor with elevated gate drain capacity
04/21/2011US20110089479 Scalable flash eeprom memory cell with floating gate spacer wrapped by control gate and method of manufacture
04/21/2011US20110089477 Nanostructured mos capacitor
04/21/2011US20110089474 Semiconductor device including misfet and its manufacture method