Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2012
03/14/2012CN102376715A Capacitance-free dynamic random access memory structure and preparation method thereof
03/14/2012CN102376714A 半导体装置及其驱动方法 Semiconductor device and driving method
03/14/2012CN102376713A Semiconductor device and method for driving semiconductor device
03/14/2012CN102376712A Method and apparatus for buried word line formation
03/14/2012CN102376711A Semiconductor memory device and manufacturing method thereof
03/14/2012CN102376708A Lateral connection for a via-less thin film resistor
03/14/2012CN102376705A ESD protection device and method for fabricating the same
03/14/2012CN102376703A Edge devices layout for improved performance
03/14/2012CN102376702A Two-terminal multi-channel ESD device and method thereof
03/14/2012CN102376700A Electronic component, manufacturing method of electronic component, spiral inductance component and manufacturing method of spiral inductance component
03/14/2012CN102376695A Stacked semiconductor device and method of fabricating the same
03/14/2012CN102376693A Monolithic magnetic induction device
03/14/2012CN102376690A Electronic component and method of manufacturing electronic component
03/14/2012CN102376689A Through silicon hole structure with step and manufacture process of through silicon hole
03/14/2012CN102376687A 半导体元件封装结构及其制造方法 The semiconductor device package structure and method for manufacturing
03/14/2012CN102376686A Semiconductor device and production method thereof
03/14/2012CN102376685A Electric fuse structure and formation method thereof
03/14/2012CN102376684A Copper interconnecting structure and manufacturing method thereof
03/14/2012CN102376683A Seal ring structure with metal pad
03/14/2012CN102376682A Semiconductor device and formation method thereof
03/14/2012CN102376680A Stacked semiconductor package and stacking method thereof
03/14/2012CN102376678A Chip scale package and manufacturing method thereof
03/14/2012CN102376677A Semiconductor encapsulating structure and manufacturing method thereof
03/14/2012CN102376675A Packaging structure with embedded semiconductor element and manufacturing method thereof
03/14/2012CN102376674A Packaging structure with embedded semi-conductor element
03/14/2012CN102376673A Packaging substrate and formation method thereof
03/14/2012CN102376672A Foundation island-free ball grid array packaging structure and manufacturing method thereof
03/14/2012CN102376667A Package apparatus and method for making same
03/14/2012CN102376666A Ball grid array packaging structure and manufacturing method thereof
03/14/2012CN102376665A Semiconductor structure and manufacture method thereof
03/14/2012CN102376664A Semiconductor device, semiconductor circuit substrate, and method of manufacturing semiconductor circuit substrate
03/14/2012CN102376662A System packaging module provided with ball grid array and production method thereof
03/14/2012CN102376656A Foundation island-free packaging structure without pins on four surfaces and manufacturing method thereof
03/14/2012CN102376654A Multiple seal ring structure
03/14/2012CN102376652A Method for manufacturing split gate flash by reducing writing interference
03/14/2012CN102376651A Method for improving capacity of filling dielectric medium between magnetic tunnel junction (MTJ) metals in magnetic random access memory (MRAM)
03/14/2012CN102376650A Manufacturing method for NOR type flash memory with multi level cell
03/14/2012CN102376649A Method for forming storage device
03/14/2012CN102376648A Manufacturing method of integrated dynamic random access memory and non-volatile memory
03/14/2012CN102376647A Method for producing CMOS (Complementary Metal Oxide Semiconductor) with air side walls
03/14/2012CN102376646A Method for improving surface morphology of dual-stress nitride
03/14/2012CN102376645A Forming method of CMOS (Complementary Metal-Oxide-Semiconductor Transistor) device stress film
03/14/2012CN102376644A Method for manufacturing semiconductor device
03/14/2012CN102376643A Cutting method
03/14/2012CN102376642A Silicon through hole technology
03/14/2012CN102376641A Method for producing copper filled silicon through hole
03/14/2012CN102376640A Method of manufacturing semiconductor device, method of processing substrate, and substrate processing apparatus
03/14/2012CN102376639A Method of forming metal lines of semiconductor device
03/14/2012CN102376638A Process for making conductive post with footing profile
03/14/2012CN102376637A Method for forming through hole
03/14/2012CN102376636A Method for forming contact hole
03/14/2012CN102376635A Contact hole structure of super junction device, and manufacturing method thereof
03/14/2012CN102376634A Preparation method of contact pin for reducing resistance of source end of RF LDMOS(radio frequency laterally diffused metal oxide semiconductor) device
03/14/2012CN102376633A Semiconductor structure and manufacturing method thereof
03/14/2012CN102376632A Method for forming structure of semiconductor device
03/14/2012CN102376631A Method for producing dual damascene structure
03/14/2012CN102376630A Semiconductor device and method for manufacturing local interconnect structure thereof
03/14/2012CN102376629A Method for realizing through-silicon-via interconnection by suspension photoresist
03/14/2012CN102376628A Manufacturing method and package structure for system in package module
03/14/2012CN102376627A Forming method of contact hole
03/14/2012CN102376626A Method for reducing size of through hole in semiconductor device
03/14/2012CN102376625A Semiconductor device and manufacturing method thereof
03/14/2012CN102376624A Graphene device and production method thereof
03/14/2012CN102376623A Method for molecular adhesion bonding at low pressure
03/14/2012CN102376622A Method for preventing cavity from appearing in dielectric layer
03/14/2012CN102376621A Manufacturing method of shallow trench isolation structure
03/14/2012CN102376620A Forming method of semiconductor device
03/14/2012CN102376619A Method for forming shallow groove structure with ONO as hard mask layer
03/14/2012CN102376618A Manufacturing method of polysilicon P type well in N type radio frequency LDMOS(laterally-diffused metal oxide semiconductor)
03/14/2012CN102376617A Substrate mounting stage, method for forming resin protuberance layer on surface of substrate mounting stage, and resin protuberance layer copying part
03/14/2012CN102376616A Film for semiconductor back surface, dicing tape-integrated film for semiconductor back surface, method for producing semiconductor device, and flip chip type semiconductor device
03/14/2012CN102376615A Film for semiconductor back surface,dicing tape-integrated film for semiconductor back surface, method for producing semiconductor device, and flip chip type semiconductor device
03/14/2012CN102376614A Film for flip chip type semiconductor back surface and dicing tape-integrated film for semiconductor back surface
03/14/2012CN102376613A Thimble module of integrated circuit die bonder
03/14/2012CN102376612A Substrate carrying mechanism, substrate carrying method, and recording medium for recording program
03/14/2012CN102376611A Film for semiconductor back surface,dicing tape-integrated film for semiconductor back surface, method for producing semiconductor device, and semiconductor device
03/14/2012CN102376610A Integrated circuit module and methods of manufaturing the same
03/14/2012CN102376609A Load port
03/14/2012CN102376608A Wafer transfer method and device
03/14/2012CN102376607A Grain conveying device
03/14/2012CN102376606A Mask box provided with sensor
03/14/2012CN102376605A Apparatus for blocking and unblocking a loading/unloading opening of a process chamber
03/14/2012CN102376604A Vacuum processing equipment and temperature control method thereof, and semiconductor device processing method
03/14/2012CN102376603A Antistatic image test worktable
03/14/2012CN102376602A Method for measuring volatility of bottom anti-reflective coating materials
03/14/2012CN102376601A Detection method and structure for deviation of contact hole
03/14/2012CN102376600A Evaluation method for failure of contact hole
03/14/2012CN102376599A Generation method and device of qualified crystal grain distribution pattern
03/14/2012CN102376598A Apparatus for wafer level bump reflow, system and method thereof
03/14/2012CN102376597A Dual-damascene structure and manufacturing method thereof
03/14/2012CN102376596A Semiconductor device with nested row contact
03/14/2012CN102376595A Method and semiconductor device of forming FO-WLCSP having conductive layers and conductive vias
03/14/2012CN102376594A Electronic package structure and package method thereof
03/14/2012CN102376593A Method for eliminating air bubbles in bottom filled rubber and bottom rubber filling machine structure
03/14/2012CN102376592A Chip size packaging part and production method thereof
03/14/2012CN102376591A Chip scale package and preparation method thereof
03/14/2012CN102376590A Chip scale package and production method thereof
03/14/2012CN102376589A Method for filling cavities in wafers, correspondingly filled blind hole and wafer having correspondingly filled insulation trenches
03/14/2012CN102376588A Side wettable plating for semiconductor chip package
03/14/2012CN102376587A Manufacturing method of encapsulating carrier plate
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