Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 7 - Arrangements for writing information into, or reading information out from, a digital store
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
12/1998
12/15/1998US5850450 Method and apparatus for encryption key creation
12/15/1998US5850366 Memory array having dummy cells implemented using standard array cells
12/15/1998US5850365 Sense amplifier with individually optimized high and low power modes
12/15/1998US5850364 Static semiconductor memory device with precharging circuits having similar configuration of memory cells
12/15/1998US5850362 Semiconductor memory device employing an improved layout of sense amplifiers
12/15/1998US5850359 Asynchronous high speed zero DC-current SRAM system
12/10/1998WO1998056004A1 Semiconductor memory device
12/10/1998WO1998055935A1 Apparatus and method for reading data from synchronous memory at increased system clock frequencies
12/10/1998WO1998055897A2 Optical logic element and methods for respectively its preparation and optical addressing, as well as the use thereof in an optical logic device
12/09/1998EP0883130A2 Voice data processing control device and recording medium recording a control program for controlling voice data processing
12/09/1998CN1041136C Wright signal input buffer in semiconductor integrated circuit
12/08/1998US5848431 Synchronous SRAMs having multiple chip select inputs and a standby chip enable input
12/08/1998US5848025 Method and apparatus for controlling a memory device in a page mode
12/08/1998US5848024 Clock controlled column decoder
12/08/1998US5848020 Semiconductor memory and method of using the same, column decoder, and image processor
12/08/1998US5848017 Method and apparatus for stress testing a semiconductor memory
12/08/1998US5848016 Merged Memory and Logic (MML) integrated circuits and methods including serial data path comparing
12/08/1998US5848015 Bitline precharge halt access mode for low power operation of a memory device
12/08/1998US5848014 Semiconductor device such as a static random access memory (SRAM) having a low power mode using a clock disable circuit
12/08/1998US5848012 Semiconductor memory device having hierarchical bit line structure employing improved bit line precharging system
12/08/1998US5848011 Semiconductor memory device
12/08/1998US5848004 Semiconductor memory device
12/08/1998US5848001 Semidirect sensing circuit having combined read and write data bus
12/08/1998US5847991 System for recording voice as analog values programmed into single bit cells EEPROMs or flash EEPROM
12/08/1998US5847986 In an integrated circuit
12/08/1998US5847583 Sense amplifier circuit in which erroneous read operation can be prevented
12/03/1998WO1998039846A3 Delay-locked loop with binary-coupled capacitor
12/03/1998DE19807014A1 Semiconducting memory element for computer system
12/03/1998DE19806999A1 Semiconductor memory element e.g. for DRAM
12/03/1998DE19757959A1 Integrated semiconducting circuit for signal processing
12/03/1998DE19756928A1 Over-riding method for bit line reading amplifier
12/02/1998EP0881644A2 Semiconductor memory device with multibank configuration
12/02/1998EP0840928A4 An integrated circuit having enable control circuitry
12/02/1998CN1200572A Semiconductor integrated circuit device operating stably at plurality of power supply voltage levels
12/02/1998CN1200570A Anti-tamper bond wire shield for integrated circuit
12/02/1998CN1200546A Semiconductor memory device
12/02/1998CN1200543A Data reading circuit for semiconductor memory device
12/01/1998USRE35978 Control circuit of dynamic random access memory
12/01/1998US5845240 Selective recall and preservation of continuously recorded data
12/01/1998US5845108 Semiconductor memory device using asynchronous signal
12/01/1998US5844859 Synchronous semiconductor memory device reliably fetching external signal in synchronization with clock signal periodically supplied from the exterior
12/01/1998US5844858 Semiconductor memory device and read and write methods thereof
12/01/1998US5844857 Row address control circuits having a predecoding address sampling pulse generator and methods for memory devices
12/01/1998US5844855 Method and apparatus for writing to memory components
12/01/1998US5844852 Memory arrays with integrated bit line voltage stabilization circuitry
12/01/1998US5844851 For preventing spurious memory readings from a memory device
12/01/1998US5844849 Dynamic semiconductor memory device having fast operation mode and operating with low current consumption
12/01/1998US5844848 Integrated circuit memory devices having improved data masking capability
12/01/1998US5844846 Data output buffer for memory device
12/01/1998US5844845 Data read circuit for use in semiconductor storage apparatus of CMOS memory
12/01/1998US5844833 DRAM with open digit lines and array edge reference sensing
12/01/1998US5844767 Level converting circuit for converting level of an input signal, internal potential generating circuit for generating internal potential, internal potential generating unit generating internal potential highly reliable semiconductor device and method of
12/01/1998US5844438 Circuit for generating an internal clock for data output buffers in a synchronous DRAM devices
12/01/1998US5844265 Sense amplifier for high-density imaging array
12/01/1998US5844262 Semiconductor device for reducing effects of noise on an internal circuit
11/1998
11/25/1998EP0880144A2 Read only memory
11/25/1998EP0880142A1 Dynamic random access memory (DRAM) having variable configuration for data processing system and corresponding expansion support for the interleaved-block configuration thereof
11/24/1998US5842170 Method for editing in hand held recorder
11/24/1998US5842169 Read/write control method and circuit for a sound recording/reproducing device
11/24/1998US5841740 Apparatus for recording and reproducing information data using recording region data for reproduction with audio and video data
11/24/1998US5841732 Fully synchronous pipelined ram
11/24/1998US5841731 Semiconductor device having externally settable operation mode
11/24/1998US5841730 Semiconductor memory device having synchronous write driver circuit
11/24/1998US5841726 Method for initializing and reprogramming a control operation feature of a memory device
11/24/1998US5841720 Memory array
11/24/1998US5841718 Use of voltage equalization in signal-sensing circuits
11/24/1998US5841717 Semiconductor memory device facilitating use of a high frequency clock signal
11/24/1998US5841715 Integrated circuit I/O using high performance bus interface
11/24/1998US5841712 Dual comparator circuit and method for selecting between normal and redundant decode logic in a semiconductor memory device
11/24/1998US5841707 Apparatus and method for a programmable interval timing generator in a semiconductor memory
11/24/1998US5841706 Semiconductor memory device capable of high speed operation in low power supply voltage
11/24/1998US5841704 Static RAM
11/24/1998US5841702 Output circuit for memory device
11/24/1998US5841698 Semiconductor device
11/24/1998US5841694 High performance programmable interconnect
11/24/1998US5841580 Memory device
11/24/1998US5841387 Method and system for encoding a digital signal
11/19/1998WO1998037656A3 Delay locked loop circuitry for clock delay adjustment
11/18/1998EP0878908A2 Semiconductor device using complementary clock and signal input state detection circuit used for the same
11/18/1998EP0829137A4 Dual feature input/timing pin
11/18/1998CN1199229A Low power memory including selective precharge circuit
11/18/1998CN1199203A Coprocessor-integrated packet-type memory LSI, packet-type memory/coprocessor bus, and control method thereof
11/17/1998US5839108 Flash memory file system in a handheld record and playback device
11/17/1998US5838990 Circuit in a semiconductor memory for programming operation modes of the memory
11/17/1998US5838699 Line memory circuit
11/17/1998US5838650 Image quality compensation method and apparatus for holographic data storage system
11/17/1998US5838632 Semiconductor memory apparatus
11/17/1998US5838631 Fully synchronous pipelined ram
11/17/1998US5838630 Integrated circuit device, semiconductor memory, and integrated circuit system coping with high-frequency clock signal
11/17/1998US5838629 Dynamic random access memory device
11/17/1998US5838627 Arrangement of power supply and data input/output pads in semiconductor memory device
11/17/1998US5838604 Semiconductor memory device with an increased band width
11/17/1998US5838469 Apparatus and method for processing data stored in page-wise memory
11/17/1998US5838256 Electronic key with three modes of automatic self-disablement
11/17/1998US5838177 Adjustable output driver circuit having parallel pull-up and pull-down elements
11/17/1998US5838176 Correlated double sampling circuit
11/17/1998US5838059 Multichip IC card and IC card system using it
11/17/1998US5838038 Dynamic random access memory device with the combined open/folded bit-line pair arrangement
11/17/1998CA2061187C Congruent state changeable optical memory material and device
11/11/1998EP0877384A2 Semiconductor memory device
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