Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 7 - Arrangements for writing information into, or reading information out from, a digital store
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
08/2008
08/21/2008CA2675561A1 Non-volatile semiconductor memory having multiple external power supplies
08/20/2008EP1579335B1 Read-write switching method for a memory controller
08/20/2008CN201104307Y Non-volatile digital memory scrip
08/20/2008CN101248142A Red-shifted water-dispersible naphthalocyanine dyes
08/20/2008CN101246738A Memory system with backup circuit and programming method
08/20/2008CN101246737A Embedded NOR type flash memory system based on duplex flow control unit
08/20/2008CN101246736A 存储器系统及其数据读取方法 The memory system and method for reading data
08/20/2008CN101246735A Portable memory device
08/20/2008CN101246677A Semiconductor integrated circuit device and data processor system
08/20/2008CN101246534A U disk with autorun virus immunity
08/20/2008CN101246209A Split type vehicle mounted GPS
08/20/2008CN101243915A Multifunction toothbrush
08/20/2008CN100412990C Nonvolatile semiconductor memory device
08/20/2008CN100412989C Non-Volatile semiconductor memory with charging read mode
08/20/2008CN100412987C Semiconductor storage device with offset-compensation read-out system
08/20/2008CN100412985C Semiconductor memory device
08/20/2008CN100412983C Memory with low and fixed pre-charge loading
08/20/2008CN100412982C Memory system, buffer device and method for operating the memory system
08/20/2008CN100412839C Synchronous data transfer circuit, computer system and memory system
08/20/2008CN100412816C Cross image storage system
08/20/2008CN100412757C Backup Memory control unit for reducing current consumption
08/20/2008CN100412749C Memory signal timing regulation method and related device
08/19/2008US7415641 System and method for repairing a memory
08/19/2008US7415590 Integrated circuit having a memory cell array capable of simultaneously performing a data read operation and a data write operation
08/19/2008US7415581 Semiconductor memory chip
08/19/2008US7415579 Memory system having a plurality of memory controllers and method for synchronizing the same
08/19/2008US7415404 Method and apparatus for generating a sequence of clock signals
08/19/2008US7415315 Recording and/or reproducing apparatus and recording apparatus
08/19/2008US7415314 Recording apparatus, reproducing apparatus, and recording and/or reproducing apparatus
08/19/2008US7414911 Cascade wake-up circuit preventing power noise in memory device
08/19/2008US7414909 Nonvolatile semiconductor memory
08/19/2008US7414908 Magnetic memory device
08/19/2008US7414907 Semiconductor memory device
08/19/2008US7414906 Memory component having a novel arrangement of the bit lines
08/19/2008US7414905 Semiconductor integrated circuit and testing method therefor
08/19/2008US7414904 Method for evaluating storage cell design using a wordline timing and cell access detection circuit
08/19/2008US7414901 Method and apparatus for timing adjustment
08/19/2008US7414900 Method and system for reading data from a memory
08/19/2008US7414899 Method and apparatus for early write termination in a semiconductor memory
08/19/2008US7414898 Semiconductor memory device with internal power supply
08/19/2008US7414896 Technique to suppress bitline leakage current
08/19/2008US7414444 Clock capture in clock synchronization circuitry
08/19/2008US7414279 Semiconductor device with improved overlay margin and method of manufacturing the same
08/14/2008WO2008095998A1 Digital data buffer
08/14/2008WO2008095294A1 Source side asymmetrical precharge programming scheme
08/14/2008WO2008081426B1 Avoiding errors in a flash memory by using substitution transformations
08/14/2008WO2008078314B1 Flash memory device, system and method with randomizing for suppressing error
08/14/2008US20080195908 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same
08/14/2008US20080195795 Pipelined burst memory access
08/14/2008US20080192557 System and method for reducing power consumption during extended refresh periods of dynamic random access memory devices
08/14/2008US20080192556 Input-output line sense amplifier having adjustable output drive capability
08/14/2008US20080192555 Single ended sense amplifier for very low voltage applications
08/14/2008US20080192554 Semiconductor device and method of testing semiconductor device
08/14/2008US20080192553 Non-Imprinting Memory with High Speed Erase
08/14/2008US20080192552 Internal address generator
08/14/2008US20080192551 Complementary output flip flop
08/14/2008US20080192547 User configurable commands for flash memory
08/14/2008US20080192536 Bit line select voltage generator and nonvolatile memory device using the same
08/14/2008US20080192535 Sense amplifiers and semiconductor devices including the same
08/14/2008US20080192531 Method of writing into semiconductor memory device
08/14/2008US20080192530 Resistive memory element sensing using averaging
08/14/2008US20080192527 Semiconductor memory device and control method thereof
08/14/2008US20080192525 Single-ended memory cell with improved read stability, memory using the cell, and methods of operating and designing same
08/14/2008DE10344818B4 Vorrichtung zum Kalibrieren der relativen Phase zweier Empfangssignale eines Speicherbausteins Apparatus for calibrating the relative phase of two received signals of a memory module
08/14/2008DE10235739B4 Register, das auf einem Speichermodul montiert ist sowie Verwendung eines Registers in einem Speichermodul Register, which is mounted on a memory module as well as using a register in a memory module
08/14/2008CA2672245A1 Source side asymmetrical precharge programming scheme
08/13/2008EP1955332A2 Pseudo-dual port memory having a clock for each port
08/13/2008EP1955173A1 Programmable preamble system and method
08/13/2008EP1908075A4 Methods and apparatus for reading a full-swing memory array
08/13/2008CN201098543Y Voice interaction toy
08/13/2008CN101241753A Memory and method for metal bit line arrangement
08/13/2008CN101241752A Memory card and memory system having the same
08/13/2008CN101241751A Semiconductor device and method of testing semiconductor device
08/13/2008CN101241750A Memory system and data transmission method
08/13/2008CN101241749A Sense amplifier circuit of semiconductor memory device and method of operating the same
08/13/2008CN101241651A Sounding book and method for providing related audio for printed picture or text using same
08/13/2008CN101241475A Prefetching from dynamic random access memory to a static random access memory
08/13/2008CN101241468A Recording apparatus and recording method
08/13/2008CN101238937A Folding type music enclosure with MP3 playing function
08/13/2008CN100411057C Delay locked loop
08/13/2008CN100411056C Small size circuit and method for detecting a status of an electrical fuse with low read current
08/13/2008CN100410980C Display controller with display memory circuit
08/13/2008CN100410905C Data output circuit used for synchronous integrated circuit storage device
08/13/2008CN100410896C Stream data buffer unit and access method thereof
08/12/2008US7411859 Multi-port memory device for buffering between hosts
08/12/2008US7411856 Semiconductor device with improved power supply arrangement
08/12/2008US7411855 Semiconductor device with improved power supply arrangement
08/12/2008US7411850 Semiconductor storage device
08/12/2008US7411849 Apparatus and method for transferring an analog signal between isolated systems
08/12/2008US7411847 Burn in system and method for improved memory reliability
08/12/2008US7411846 Memory redundance circuit techniques
08/12/2008US7411845 Redundancy circuit and semiconductor apparatus having the redundancy circuit
08/12/2008US7411843 Semiconductor memory arrangement with branched control and address bus
08/12/2008US7411842 Data arrangement control signal generator for use in semiconductor memory device
08/12/2008US7411840 Sense mechanism for microprocessor bus inversion
08/12/2008US7411839 Data input circuit of semiconductor memory device and data input method thereof
08/12/2008US7411831 Disk processing apparatus with voltage generating circuit having a boost ratio control
08/12/2008US7411814 Programmable magnetic memory device FP-MRAM
08/12/2008US7411812 Memory architecture and method of manufacture and operation thereof
08/12/2008US7411809 Ferroelectric memory to be tested by applying disturbance voltage to a plurality of ferroelectric capacitors at once in direction to weaken polarization, and method of testing the same
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