Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
---|
06/10/2008 | US7385850 Method of programming and verifying cells of a nonvolatile memory and relative NAND FLASH memory |
06/10/2008 | US7385281 Semiconductor integrated circuit device |
06/10/2008 | US7385129 Music reproducing system |
06/05/2008 | WO2008064480A1 Flash memory program inhibit scheme |
06/05/2008 | WO2008064466A1 Non-volatile memory serial core architecture |
06/05/2008 | WO2007001944A3 Synchronous one-bit interface protocol or data structure |
06/05/2008 | US20080130393 Semiconductor memory and electronic device |
06/05/2008 | US20080130392 Method of erasing a resistive memory device |
06/05/2008 | US20080130391 Ram with trim capacitors |
06/05/2008 | US20080130390 Semiconductor storage apparatus |
06/05/2008 | US20080130389 Semiconductor storage apparatus |
06/05/2008 | US20080130388 Semiconductor device having a system in package structure and method of testing the same |
06/05/2008 | US20080130384 Delay locked loop circuit |
06/05/2008 | US20080130383 Semiconductor memory device |
06/05/2008 | US20080130382 Write circuit of memory device |
06/05/2008 | US20080130381 Methods of programming and erasing resistive memory devices |
06/05/2008 | US20080130380 Single-port SRAM with improved read and write margins |
06/05/2008 | US20080130379 Semiconductor memory device |
06/05/2008 | US20080130378 Memory device and method for performing write operations in such a memory device |
06/05/2008 | US20080130377 Circuit and method for calibrating data control signal |
06/05/2008 | US20080130376 Semiconductor memory device including floating body memory cells and method of operating the same |
06/05/2008 | US20080130375 High Speed, Leakage Tolerant, Double Bootstrapped Multiplexer Circuit with High Voltage Isolation |
06/05/2008 | US20080130361 Circuit and method for generating a reference voltage in memory devices having a non-volatile cell matrix |
06/05/2008 | US20080130358 Semiconductor memory device having floating body cell |
06/05/2008 | US20080130357 Method of programming memory device |
06/05/2008 | US20080130356 Memory Device |
06/05/2008 | US20080130352 Structure and Method for Biasing Phase Change Memory Array for Reliable Writing |
06/05/2008 | US20080130345 Semiconductor memory device |
06/05/2008 | US20080129345 Low-voltage, low-power-consumption, and high-speed differential current-sense amplification |
06/05/2008 | DE4229710B4 Digitales Audiodatenspeicherungssystem und damit ausgerüstetes digitales Audio-System Digital audio data storage system equipped therewith and digital audio system |
06/05/2008 | DE102007057321A1 Bewertungseinheit in einer integrierten Schaltung Assessment unit in an integrated circuit |
06/05/2008 | DE102004033387B4 Digitale RAM-Speicherschaltung mit erweiterter Befehlsstruktur Digital RAM memory circuit with extended command structure |
06/05/2008 | CA2664851A1 Flash memory program inhibit scheme |
06/05/2008 | CA2663414A1 Non-volatile memory serial core architecture |
06/04/2008 | EP1927989A1 Editing apparatus and editing method |
06/04/2008 | EP1927988A1 Predictive timing calibration for memory devices |
06/04/2008 | EP1927870A2 Portable data carrier |
06/04/2008 | EP1927203A2 Strobe technique for test of digital signal timing |
06/04/2008 | EP1927111A2 Method and circuitry to generate a reference current for reading a memory cell, and device implementing same |
06/04/2008 | EP1620859B1 Reference current generator, and method of programming, adjusting and/or operating same |
06/04/2008 | EP1435098B1 Mram bit line word line architecture |
06/04/2008 | CN201069657Y Sound circuit applied into the toy |
06/04/2008 | CN201069648Y Media player of built-in display screen |
06/04/2008 | CN201068008Y Vocal photograph album |
06/04/2008 | CN201067350Y Frying and roasting equipment with music playing function |
06/04/2008 | CN101194319A Configuration finalization on first valid NAND command |
06/04/2008 | CN101194318A Memory device identification |
06/04/2008 | CN101192823A Calibration circuit |
06/04/2008 | CN101192692A Battery electric quantity alarm method |
06/04/2008 | CN101192446A Method of driving multi-level variable resistive memory device and multi-level variable resistive memory device |
06/04/2008 | CN101192444A Flash combining radio |
06/04/2008 | CN101192441A Safe U disk memorizer |
06/04/2008 | CN100392848C Semiconductor device and electronic apparatus equipped with the semiconductor device |
06/04/2008 | CN100392762C Method and circuit for transmitting address information |
06/04/2008 | CN100392760C Semiconductor storage device |
06/04/2008 | CN100392756C Method anc circuit for writting storage unit |
06/03/2008 | USRE40356 Large-capacity semiconductor memory with improved layout for sub-amplifiers to increase operational speed |
06/03/2008 | US7383476 System architecture and method for three-dimensional memory |
06/03/2008 | US7382681 Semiconductor integrated circuit |
06/03/2008 | US7382677 Memory device having internal voltage supply providing improved power efficiency during active mode of memory operation |
06/03/2008 | US7382676 Method of forming a programmable voltage regulator and structure therefor |
06/03/2008 | US7382675 Semiconductor memory device |
06/03/2008 | US7382673 Memory having parity generation circuit |
06/03/2008 | US7382672 Differential and hierarchical sensing for memory circuits |
06/03/2008 | US7382671 Method for detecting column fail by controlling sense amplifier of memory device |
06/03/2008 | US7382670 Semiconductor integrated circuit device |
06/03/2008 | US7382669 Semiconductor memory component and method for testing semiconductor memory components |
06/03/2008 | US7382668 Full-stress testable memory device having an open bit line architecture and method of testing the same |
06/03/2008 | US7382667 Active termination circuit and method for controlling the impedance of external integrated circuit terminals |
06/03/2008 | US7382666 Power supply circuit for delay locked loop and its method |
06/03/2008 | US7382665 Method for detecting data strobe signal |
06/03/2008 | US7382664 Simultaneous reading from and writing to different memory cells |
06/03/2008 | US7382646 Memory architecture containing a high density memory array of semi-volatile or non-volatile memory elements |
06/03/2008 | US7382639 System and method for optically interconnecting memory devices |
06/03/2008 | US7382638 Matchline sense circuit and method |
06/03/2008 | US7382152 I/O interface circuit of integrated circuit |
05/29/2008 | WO2008063199A1 Memory systems and methods for dynamically phase adjusting a write strobe and data to account for receive-clock drift |
05/29/2008 | WO2008028042A3 Memory data transfer |
05/29/2008 | WO2007140031A3 Sram split write control for a delay element |
05/29/2008 | US20080126059 Method and apparatus for generating a sequence of clock signals |
05/29/2008 | US20080123457 Power supply circuit for sense amplifier of semiconductor memory device |
05/29/2008 | US20080123456 Semiconductor memory device suitable for mounting on portable terminal |
05/29/2008 | US20080123455 Sense amplifier of semiconductor memory device |
05/29/2008 | US20080123454 Circuit and methods for eliminating skew between signals in semiconductor integrated circuit |
05/29/2008 | US20080123453 Circuit and method for controlling sense amplifier of a semiconductor memory apparatus |
05/29/2008 | US20080123452 Semiconductor memory device including a write recovery time control circuit |
05/29/2008 | US20080123451 Memories with selective precharge |
05/29/2008 | US20080123450 Memories with front end precharge |
05/29/2008 | US20080123449 Systems and methods for reading data from a memory array |
05/29/2008 | US20080123448 Memory device architecture and method for high-speed bitline pre-charging |
05/29/2008 | US20080123447 Dram concurrent writing and sensing scheme |
05/29/2008 | US20080123446 Randomizing Current Consumption in Memory Devices |
05/29/2008 | US20080123445 Circuits to delay a signal from ddr-sdram memory device including an automatic phase error correction |
05/29/2008 | US20080123444 Adaptive memory calibration using bins |
05/29/2008 | US20080123443 Semiconductor memory device and method for driving the same |
05/29/2008 | US20080123442 Method to improve performance of sram cells, sram cell, sram array, and write circuit |
05/29/2008 | US20080123441 Reducing the format time for bit alterable memories |
05/29/2008 | US20080123440 Memory controller and output signal driving circuit thereof |
05/29/2008 | US20080123439 Semiconductor integrated circuit and method of operating the same |
05/29/2008 | US20080123438 Evaluation unit in an integrated circuit |