Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 7 - Arrangements for writing information into, or reading information out from, a digital store
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
12/2008
12/02/2008US7460422 Determining history state of data based on state of partially depleted silicon-on-insulator
12/02/2008US7460420 Semiconductor storage device
12/02/2008US7460419 Nonvolatile semiconductor storing device and block redundancy saving method
12/02/2008US7460417 Semiconductor device, semiconductor memory device and data strobe method
12/02/2008US7460416 Voltage supply circuit and semiconductor memory
12/02/2008US7460413 Memory compiler redundancy
12/02/2008US7460407 Temperature compensation of voltages of unselected word lines in non-volatile memory based on word line position
12/02/2008US7460391 Write VCCMIN improvement scheme
12/02/2008US7460388 Semiconductor memory device
12/02/2008US7460387 eDRAM hierarchical differential sense amp
12/02/2008US7459929 Semiconductor integrated circuit device and on-die termination circuit
12/02/2008US7459321 Method of storing a data bit in a fast-write alloy
11/2008
11/27/2008WO2008144526A1 Method and apparatus for reducing leakage current in memory arrays
11/27/2008WO2008142356A2 Cryptoprocessor with improved data protection
11/27/2008WO2008121426A9 Testing for sram memory data retention
11/27/2008WO2008117042A3 Ram circuit
11/27/2008US20080291765 Methods, circuits, and systems to select memory regions
11/27/2008US20080291764 Semiconductor memory device
11/27/2008US20080291763 Memory device
11/27/2008US20080291762 Semiconductor memory device for precharging bit lines except for specific reading and writing periods
11/27/2008US20080291760 Sub-array architecture memory devices and related systems and methods
11/27/2008US20080291759 Apparatus and method of generating output enable signal for semiconductor memory apparatus
11/27/2008US20080291758 Read-leveling implementations for ddr3 applications on an fpga
11/27/2008US20080291757 Signal masking method, signal masking circuit, and semiconductor integrated circuit
11/27/2008US20080291756 Semiconductor memory device of controlling bit line sense amplifier
11/27/2008US20080291755 Output circuit for a semiconductor memory device and data output method
11/27/2008US20080291754 Semiconductor memory device with low standby current
11/27/2008US20080291753 Semiconductor memory device and latency signal generating method thereof
11/27/2008US20080291752 Semiconductor Device
11/27/2008US20080291751 Scr matrix storage device
11/27/2008US20080291749 Method and apparatus for timing adjustment
11/27/2008US20080291748 Wide window clock scheme for loading output fifo registers
11/27/2008US20080291747 Buffered Memory Device
11/27/2008US20080291746 Semiconductor Storage Device and Burst Operation Method
11/27/2008US20080291745 Method and system for simultaneous reads of multiple arrays
11/27/2008US20080291738 Methods and circuits for generating a high voltage and related semiconductor memory devices
11/27/2008US20080291734 Nonvolatile memory devices and methods of controlling the wordline voltage of the same
11/27/2008US20080291733 Loading data with error detection in a power on sequence of flash memory device
11/27/2008US20080291730 Reducing effects of program disturb in a memory device
11/27/2008US20080291727 Semiconductor memory system having volatile memory and non-volatile memory that share bus, and method of controlling operation of non-volatile memory
11/27/2008US20080291717 Semiconductor storage device incorporated into a system lsi with finer design rules
11/27/2008US20080291715 Nonvolatile memory device using variable resistive materials
11/27/2008US20080290342 Methods and apparatus for a flexible circuit interposer
11/27/2008DE112004000661B4 Integrierte Schaltung mit einem magnetisch ummantelten Leiter An integrated circuit comprising a magnetically coated conductor
11/27/2008DE10244400B4 Schaltungsanordnung mit Taktsignal-Ermittlungs-Einrichtung Circuit with clock signal investigative device
11/27/2008DE102008024301A1 Integrierte Schaltung und Verfahren zum Erfassen eines Signalflankenübergangs Integrated circuit and method for detecting a signal edge transition
11/27/2008DE102008021348A1 Halbleiterspeicher, Speicherzugriffs-Steuersystem und Datenlese-Verfahren Semiconductor memories, memory access control system, and data read method
11/27/2008DE102007023653A1 Semiconductor memory e.g. dynamic RAM, has element controlled by memory such that element decouples segment from amplifier during reading and refreshing of memory cell that is connected to line
11/27/2008DE102006001117B4 Apparat für Strom-Erfass-Verstärker-Kalibrierung in MRAM-Einrichtungen Apparatus for current-sense amplifier calibration in MRAM devices
11/27/2008DE102004011741B4 Halbleiterspeicherschaltung und zugehöriger Halbleiterspeicherbaustein A semiconductor memory circuit and related semiconductor memory device
11/26/2008EP1994534A1 Memory device distributed controller system
11/26/2008EP1994512A2 Rfid tag data retention verification and refresh
11/26/2008EP1994489A1 Method of reducing electro-static discharge (esd) from conductors on insulators
11/26/2008EP1880387B1 Device for protecting a memory against fault-injection attacks
11/26/2008EP1397808B3 Steering gate and bit line segmentation in non-volatile memories
11/26/2008CN201156844Y Structure improved U disc
11/26/2008CN201156431Y Power amplifying player mounted on motorcycle
11/26/2008CN201156430Y U disk with write protection prompt knob
11/26/2008CN201156429Y Portable disc free of changing case and having fragrance
11/26/2008CN201153779Y Automatic energized or deenergized digital picture frame
11/26/2008CN101312336A Stepping motor control device, stepping motor control method, image forming device and stepping motor
11/26/2008CN101312068A Semiconductor memory system and method for controlling non-volatile memory operation
11/26/2008CN101310933A Hand tool with earphone
11/26/2008CN100438043C Master slice, semiconductor memory, and method for manufacturing semiconductor memory
11/26/2008CN100437833C Calibrating method and memory system
11/26/2008CN100437824C Data pass control device for masking write ringing in ddr sdram and method thereof
11/26/2008CN100437823C Semiconductor memory
11/26/2008CN100437821C Method for controlling current during read and program operations of programmable diode
11/26/2008CN100437817C Magnetic random access storage based on circular magnetic multilayer film and its control method
11/26/2008CN100437815C Device for generating a bit line selection signal of a memory device
11/26/2008CN100437814C Memory element with built-in error connecting function
11/26/2008CN100437813C Digital camera
11/26/2008CN100437801C Automatic regulating method of Mips number operated during decoder decoding process
11/25/2008US7458004 Semiconductor storage device
11/25/2008US7457997 Apparatus and method for detecting over-programming condition in multistate memory device
11/25/2008US7457996 Semiconductor integrated circuit capable of testing with small scale circuit configuration
11/25/2008US7457392 Delay locked loop
11/25/2008US7457192 Semiconductor memory device and module for high frequency operation
11/25/2008US7457189 Integrated circuit memory devices that support selective mode register set commands and related methods
11/25/2008US7457187 Design structure for in-system redundant array repair in integrated circuits
11/25/2008US7457186 Semiconductor memory device
11/25/2008US7457185 Semiconductor memory device with advanced refresh control
11/25/2008US7457184 Dielectric relaxation memory
11/25/2008US7457183 Operating array cells with matched reference cells
11/25/2008US7457182 Semiconductor memory including self-timing circuit
11/25/2008US7457181 Memory device and method of operating the same
11/25/2008US7457180 Method and apparatus for storing data in a write-once non-volatile memory
11/25/2008US7457179 Semiconductor memory device, system and method of testing same
11/25/2008US7457176 Semiconductor memory and memory module
11/25/2008US7457175 Dual data rate memory strobe checker
11/25/2008US7457174 Semiconductor memory and method for adapting the phase relationship between a clock signal and strobe signal during the acceptance of write data to be transmitted
11/25/2008US7457173 Area efficient differential EEPROM cell with improved data retention and read/write endurance
11/25/2008US7457172 Memory device and method having data path with multiple prefetch I/O configurations
11/25/2008US7457171 Integrated semiconductor memory with transmission of data via a data interface
11/25/2008US7457170 Memory device that provides test results to multiple output pads
11/25/2008US7457169 Flash with consistent latency for read operations
11/25/2008US7457157 NAND flash memory devices and methods of LSB/MSB programming the same
11/25/2008US7457153 Integrated circuit memory devices having magnetic memory cells therein that utilize dual-ferromagnetic data layers
11/25/2008US7457142 Semiconductor memory device
11/25/2008US7456778 Method and apparatus for calibrating a multi-level current mode driver having a plurality of source calibration signals
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