Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 7 - Arrangements for writing information into, or reading information out from, a digital store
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
11/2008
11/25/2008US7456663 Output circuit
11/25/2008US7456650 Memory system with stable termination of a pair of differential signals transmitted via a pair of transmission lines
11/25/2008US7455234 Roll back method for a smart card
11/20/2008WO2008138193A1 Recordable electrical memory
11/20/2008WO2008121556A3 Semi-shared sense amplifier and global read line architecture
11/20/2008US20080288106 Content Distribution Systems and Methods
11/20/2008US20080285375 Semiconductor device, module including the semiconductor device, and system including the module
11/20/2008US20080285372 Multi- port memory device for buffering between hosts and non-volatile memory devices
11/20/2008US20080285369 Block erase for volatile memory
11/20/2008US20080285368 Method for nrom array word line retry erasing and threshold voltage recovering
11/20/2008US20080285367 Method and apparatus for reducing leakage current in memory arrays
11/20/2008US20080285364 Data input circuit of semiconductor memory apparatus and data input method using the same
11/20/2008US20080285363 Self-feedback control pipeline architecture for memory read path applications
11/20/2008US20080285362 Semiconductor memory device
11/20/2008US20080285361 Input/output line sense amplifier and semiconductor device having the same
11/20/2008US20080285360 Semiconductor Memory Device and Method of Reading Data Therefrom
11/20/2008US20080285359 Level-shifter circuit and memory device comprising said circuit
11/20/2008US20080285358 Method and circuit for stressing upper level interconnects in semiconductor devices
11/20/2008US20080285357 1-transistor type dram cell, dram device and dram comprising thereof and driving method thereof and manufacturing method thereof
11/20/2008US20080285356 Semiconductor memory device employing clamp for preventing latch up
11/20/2008US20080285351 Measuring threshold voltage distribution in memory using an aggregate characteristic
11/20/2008US20080285340 Apparatus for reading data and method using the same
11/20/2008US20080285336 Semiconductor device
11/20/2008US20080285330 Methods of operating a bistable resistance random access memory with multiple memory layers and multilevel memory states
11/20/2008DE102008019927A1 Symmetrischer Differenzstrom-Leseverstärker The balanced differential current sense amplifier
11/20/2008DE102008018955A1 Auf Strombereich abgestimmte Messarchitektur für Multipegel-Phasenänderungsspeicher Tailored to current range measurement architecture for multi-level phase change memory
11/20/2008DE102007023024A1 Component e.g. dynamic RAM, for memory component module of electronic system, has precharging/homogenizing circuit with N channel MOSFET, whose diffusion area is separated from diffusion area of two N channel MOSFETs
11/19/2008EP1991988A1 Method and system to increase the write cycle of solid state memory
11/19/2008EP1384232A4 Dynamic data restore in thyristor-based memory device
11/19/2008CN201153260Y Two-in-one USB disk wireless net playing card apparatus
11/19/2008CN201153049Y Playing apparatus for multiple storage cards of same kind
11/19/2008CN201153048Y Recoding pen for special purpose
11/19/2008CN201153047Y Key-press self-assistant travel guiding machine
11/19/2008CN201153046Y Digital player expanding apparatus
11/19/2008CN201152971Y Media play apparatus
11/19/2008CN101310238A Clock deskewing method, apparatus and system
11/19/2008CN101308901A Magnetoresistance effect element and magnetoresistive random access memory using the same
11/19/2008CN101308700A Divulging secret prevention U disk
11/19/2008CN101308699A Shaped album media and play apparatus
11/19/2008CN101308698A 存储装置 Storage device
11/19/2008CN101308697A FIFO burst buffer with large capacity based on SDRAM and data storage method
11/19/2008CN100435340C Semiconductor memory device
11/19/2008CN100435242C Method of recovering overerased bits in a memory device
11/19/2008CN100435238C System for controlling mode changes in a voltage down-converter
11/19/2008CN100435116C Non-volatile memory and method with memory planes alignment
11/19/2008CN100435115C Non-volatile memory and method with non-sequential update block management
11/18/2008US7454693 LDPC decoder
11/18/2008US7454672 Semiconductor memory device testable with a single data rate and/or dual data rate pattern in a merged data input/output pin test mode
11/18/2008US7454629 Electronic data processing device
11/18/2008US7454555 Apparatus and method including a memory device having multiple sets of memory banks with duplicated data emulating a fast access time, fixed latency memory device
11/18/2008US7453774 Disk array system
11/18/2008US7453754 Semiconductor memory device changing refresh interval depending on temperature
11/18/2008US7453753 Semiconductor memory apparatus
11/18/2008US7453752 Method for hiding a refresh in a pseudo-static memory with plural DRAM sub-arrays and an on-board address decoder
11/18/2008US7453751 Sample and hold memory sense amplifier
11/18/2008US7453750 Flash memory device with word line discharge unit and data read method thereof
11/18/2008US7453749 Semiconductor memory device with electrically rewritable and non-volatile memory cells arranged therein
11/18/2008US7453748 DRAM bit line precharge voltage generator
11/18/2008US7453747 Active compensation for operating point drift in MRAM write operation
11/18/2008US7453746 Reconstruction of signal timing in integrated circuits
11/18/2008US7453745 Semiconductor memory device and latency signal generating method thereof
11/18/2008US7453744 Buffer control circuit, semiconductor memory device for memory module including the buffer control circuit, and control method of the buffer control circuit
11/18/2008US7453741 Semiconductor device card providing multiple working voltages
11/18/2008US7453740 Method and apparatus for initializing reference cells of a toggle switched MRAM device
11/18/2008US7453739 Semiconductor integrated circuit adapted to output pass/fail results of internal operations
11/18/2008US7453738 Semiconductor device
11/18/2008US7453725 Apparatus for eliminating leakage current of a low Vt device in a column latch
11/18/2008US7453714 Over-driven access method and device for ferroelectric memory
11/18/2008US7453302 Temperature compensated delay signals
11/13/2008WO2008136826A1 Word line voltage boost system and method for non-volatile memory devices and memory devices and processor-based system using same
11/13/2008WO2008136798A1 Nano-vacuum-tubes and their application in storage devices
11/13/2008WO2008134858A1 Multi-level cell access buffer with dual function
11/13/2008US20080280408 Semiconductor device with improved overlay margin and method of manufacturing the same
11/13/2008US20080279323 Method and apparatus for generating a phase dependent control signal
11/13/2008US20080279031 Semiconductor integrated circuit
11/13/2008US20080279028 Flash/dynamic random access memory field programmable gate array
11/13/2008US20080279027 Thermally Stable Reference Voltage Generator for Mram
11/13/2008US20080279026 Signal sensing circuit and semiconductor memory device using the same
11/13/2008US20080279025 Electronic Circuit with Memory for Which a Threshold Level is Selected
11/13/2008US20080279024 Programmable boosting and charge neutralization
11/13/2008US20080279023 Semiconductor integrated circuit with full-speed data transition scheme for DDR SDRSM at internally doubled clock testing application
11/13/2008US20080279022 Semiconductor device with self refresh test mode
11/13/2008US20080279019 Semiconductor device
11/13/2008US20080279018 Redundancy circuit capable of reducing time for redundancy discrimination
11/13/2008US20080279017 Semiconductor memory device
11/13/2008US20080279016 Simplified-down mode control circuit utilizing active mode operation control signals
11/13/2008US20080279015 Register file
11/13/2008US20080279011 Data processing apparatus
11/13/2008US20080279009 Nonvolatile Semiconductor Memory Device and Writing Method of the Same
11/13/2008US20080279003 Multiple independent serial link memory
11/13/2008US20080279000 Nonvolatile semiconductor memory
11/13/2008US20080278997 Semiconductor memory device and write control method thereof
11/13/2008US20080278996 Programmable magnetic read only memory (mrom)
11/13/2008US20080278991 Semiconductor memory device
11/13/2008DE102008021409A1 Verwendung von mehreren spannungsgesteuerten Verzögerungsleitungen für die präzise Ausrichtung und Arbeitszyklussteuerung der Datenausgabe einer DDR-Speichereinrichtung Using a plurality of voltage-controlled delay lines for the precise alignment and duty cycle control of the data output of a DDR memory device
11/12/2008EP1989712A2 Systems, methods, and apparatuses for using the same memory type to support an error check mode and a non-error check mode
11/12/2008EP1989711A1 Method and apparatus for cascade memory
11/12/2008EP1257929B1 Sound and image producing system
11/12/2008CN201149772Y Electronic health passport U disk
11/12/2008CN101305517A High speed and low power SRAM macro architecture and method
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