Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 7 - Arrangements for writing information into, or reading information out from, a digital store
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
11/2008
11/04/2008US7447094 Method for power-saving multi-pass sensing in non-volatile memory
11/04/2008US7447093 Method for controlling voltage in non-volatile memory systems
11/04/2008US7447092 Write driver circuit for controlling a write current applied to a phase change memory based on an ambient temperature
11/04/2008US7447091 Sense amplifier for semiconductor memory device
11/04/2008US7447090 Semiconductor memory device
11/04/2008US7447089 Bitline precharge voltage generator
11/04/2008US7447088 Semiconductor memory device having an open bit line structure, and method of testing the same
11/04/2008US7447087 Semiconductor memory device having memory block configuration
11/04/2008US7447086 Selective program voltage ramp rates in non-volatile memory
11/04/2008US7447085 Multilevel driver
11/04/2008US7447083 Semiconductor memory device having low power consumption type column decoder and read operation method thereof
11/04/2008US7447070 Highly compact non-volatile memory and method therefor with internal serial buses
11/04/2008US7447066 Memory with retargetable memory cell redundancy
11/04/2008US7446586 Pulse generator
11/04/2008US7446580 System and method to improve the efficiency of synchronous mirror delays and delay locked loops
11/04/2008US7446573 Comparator systems and methods
10/2008
10/30/2008WO2008131086A1 Systems and devices for implementing sub-threshold memory devices
10/30/2008WO2008131069A1 Systems and devices for sub-threshold data capture
10/30/2008WO2008130703A2 Clock synchronization in a memory system
10/30/2008WO2008130504A1 Seeding replication
10/30/2008WO2008099348A3 Semiconductor device identifier generation
10/30/2008WO2008093257A3 Method of protecting against attacks and circuit therefor
10/30/2008WO2007038233A3 Strobe technique for test of digital signal timing
10/30/2008US20080267000 Single-clock, strobeless signaling system
10/30/2008US20080266993 Serial connection external interface from printed circuit board translation to parallel memory protocol
10/30/2008US20080266992 Dram with hybrid sense amplifier
10/30/2008US20080266990 Flexible redundancy replacement scheme for semiconductor device
10/30/2008US20080266989 Sram circuitry
10/30/2008US20080266988 Multi- port memory device for buffering between hosts and non-volatile memory devices
10/30/2008US20080266987 Dram with word line compensation
10/30/2008US20080266986 Timing improvements by dual output synchronizing buffer
10/30/2008US20080266985 Methods and apparatus for testing integrated circuits
10/30/2008US20080266984 Programmable Heavy-Ion Sensing Device for Accelerated DRAM Soft Error Detection
10/30/2008US20080266965 Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells
10/30/2008US20080266953 Single latch data circuit in a multiple level cell non-volatile memory device
10/30/2008US20080266942 Multiple level cell phase-change memory device having pre-reading operation resistance drift recovery, memory systems employing such devices and methods of reading memory devices
10/30/2008US20080266938 Magnetoresistive device and method of packaging same
10/30/2008US20080266936 Memory device using SRAM circuit
10/30/2008US20080266935 Dram storage capacitor without a fixed voltage reference
10/30/2008US20080266928 Semiconductor memory device
10/30/2008DE10318607B4 Verbesserte Speicherungszustände in einem Speicher Improved storage conditions in a memory
10/30/2008DE102007019117A1 Speichermodul Memory module
10/29/2008EP1769580A4 Low power and low timing jitter phase-lock loop and method
10/29/2008CN201142793Y Sliding closure folding type U disk
10/29/2008CN201142792Y Sliding extension type U disk
10/29/2008CN201142788Y Movable memory device
10/29/2008CN201142232Y MP3 and MP4 player with touch pen
10/29/2008CN201142231Y Multifunctional digital timing reminding player
10/29/2008CN201142230Y Voice device with recording playback and timing broadcast function
10/29/2008CN201142229Y Flash memory array device
10/29/2008CN201142228Y Card type USB flash memory
10/29/2008CN201142227Y Movable memory device
10/29/2008CN201142173Y Digital photo frame
10/29/2008CN201141089Y Interface for washing machine computer plate and speech player
10/29/2008CN101295535A Electronic card with video module
10/29/2008CN100429723C Semiconductor memory
10/29/2008CN100429721C Magnetic DASD based on vertical current writing and its control method
10/29/2008CN100429702C Method and apparatus for read bitline clamping for gain cell DRAM devices
10/28/2008USRE40552 Dynamic random access memory using imperfect isolating transistors
10/28/2008US7444563 Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program
10/28/2008US7444560 Test clocking scheme
10/28/2008US7444490 Apparatus, system, and method for modifying memory voltage and performance based on a measure of memory device stress
10/28/2008US7443757 Non-volatile memory and method with reduced bit line crosstalk errors
10/28/2008US7443754 Semiconductor memory device
10/28/2008US7443753 Memory structure, programming method and reading method therefor, and memory control circuit thereof
10/28/2008US7443752 Semiconductor memory device amplifying data
10/28/2008US7443751 Programmable sense amplifier multiplexer circuit with dynamic latching mode
10/28/2008US7443750 Switched capacitor DRAM sense amplifier with immunity to mismatch and offsets
10/28/2008US7443749 Switched capacitor DRAM sense amplifier with immunity to mismatch and offsets
10/28/2008US7443748 Semiconductor memory device and method of testing the same
10/28/2008US7443747 Memory array bit line coupling capacitor cancellation
10/28/2008US7443746 Memory array tester information processing system
10/28/2008US7443744 Method for reducing wiring and required number of redundant elements
10/28/2008US7443743 Method and system for improved efficiency of synchronous mirror delays and delay locked loops
10/28/2008US7443742 Memory arrangement and method for processing data
10/28/2008US7443741 DQS strobe centering (data eye training) method
10/28/2008US7443740 Integrated semiconductor memory with adjustable internal voltage
10/28/2008US7443738 Data transfer apparatus in semiconductor memory device and method of controlling the same
10/28/2008US7443737 Register file
10/28/2008US7443728 NAND flash memory device and method of programming same
10/28/2008US7443715 SRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators
10/28/2008US7443212 Semiconductor integrated circuit controlling output impedance and slew rate
10/23/2008WO2008127698A2 Memory system with point-to-point request interconnect
10/23/2008WO2008127668A1 System and method for detecting and mitigating the writing of sensitive data to memory
10/23/2008US20080261363 Dual gated finfet gain cell
10/23/2008US20080259708 Memory controller
10/23/2008US20080259707 Semiconductor storage device
10/23/2008US20080259706 Semiconductor memory
10/23/2008US20080259704 Semiconductor device in which a plurality of memory macros are mounted, and testing method thereof
10/23/2008US20080259703 Self-timed synchronous memory
10/23/2008US20080259700 Bus control apparatus and bus control method
10/23/2008US20080259699 Memory Control With Selective Retention
10/23/2008US20080259698 High speed dual port memory without sense amplifier
10/23/2008US20080259697 Semiconductor memory device having output impedance adjustment circuit and test method of output impedance
10/23/2008US20080259696 Distributed write data drivers for burst access memories
10/23/2008US20080259695 Semiconductor Memory Devices Having a Demultiplexer and Related Methods of Testing Such Semiconductor Memory Devices
10/23/2008US20080259694 Semiconductor Device
10/23/2008US20080259693 Semiconductor Device
10/23/2008US20080259692 Semiconductor Memory Device for Simultaneously Performing Read Access and Write Access
10/23/2008US20080259683 Method and circuit for programming a memory cell, in particular of the nor flash type
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