Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
09/2008
09/18/2008US20080227459 Methods and apparatus for the utilization of core based nodes for state transfer
09/18/2008US20080225619 Semiconductor memory, memory controller, system, and operating method of semiconductor memory
09/18/2008US20080225618 Non-Volatile Semiconductor Memory
09/18/2008US20080225617 Method for high speed sensing for extra low voltage dram
09/18/2008US20080225616 Method for increasing retention time in dram
09/18/2008US20080225613 Memory row and column redundancy
09/18/2008US20080225612 Semiconductor memory device
09/18/2008US20080225611 Method and apparatus for improving sram cell stabilty by using boosted word lines
09/18/2008US20080225610 Write driver of semiconductor memory device and driving method thereof
09/18/2008US20080225609 Voltage generating circuit and reference voltage generating circuit for semiconductor memory apparatus, and semiconductor system using the same
09/18/2008US20080225608 Semiconductor memory device and control signal generating method thereof
09/18/2008US20080225607 Division-based sensing and partitioning of electronic memory
09/18/2008US20080225606 Data output circuit and method in ddr synchronous semiconductor device
09/18/2008US20080225605 Latch structure and bit line sense amplifier structure including the same
09/18/2008US20080225604 Semiconductor memory device
09/18/2008US20080225603 Circuit
09/18/2008US20080225600 Method of reading data in a non-volatile memory device
09/18/2008US20080225596 High accuracy adaptive programming
09/18/2008US20080225579 Memory architecture and method of manufacture and operation thereof
09/18/2008US20080225577 Magnetic random access memory, and write method and manufacturing method of the same
09/18/2008US20080225572 Circuit arrays having cells with combinations of transistors and nanotube switching elements
09/18/2008US20080225571 Complementary bit PCRAM sense amplifier and method of operation
09/18/2008US20080225570 Over-driven access method and device for ferroelectric memory
09/18/2008DE10252492B4 Schaltung und Verfahren zur Dateneingabe für ein synchrones Halbleiterspeicherbauelement Circuit and method for data input for a synchronous semiconductor memory device
09/18/2008DE10238494B4 Verfahren zur Detektion eines Logikzustands und zugehörige integrierte Halbleiterschaltung A method for detecting a logic state and related semiconductor integrated circuit
09/18/2008DE102008013328A1 Verfahren zum Verarbeiten von Daten in einer Speicheranordnung, Speicheranordnung und Computersystem A method of processing data in a memory array, memory array and computer system
09/18/2008DE102008012833A1 Abgekürzte Stossdatentransfers für Halbleiterspeicher Abbreviated shock data transfers for semiconductor memories
09/18/2008DE102008005865A1 Halbleiterspeicherbauelement, Verfahren zum Steuern eines Zugriffs auf eine Mailbox in einem Halbleiterspeicherbauelement und computerlesbares Speichermedium A semiconductor memory device, method for controlling access to a mailbox in a semiconductor memory device, and computer readable storage medium
09/18/2008DE102005042269B4 Speichersystem mit zwei Taktsignalleitungen und einer Speichervorrichtung Memory system having two clock signal lines and a storage device
09/17/2008EP1970910A1 Semiconductor memory device
09/17/2008EP1969600A2 Configurable inputs and outputs for memory stacking system and method
09/17/2008CN201117302Y MP3 recording support
09/17/2008CN201117294Y Writing signal locking non-volatility memory
09/17/2008CN201117293Y Memory writing protection circuit and television with the same
09/17/2008CN201117292Y Voice broadcasting device for needle checking machine
09/17/2008CN201117291Y Audio frequency and video frequency player capable of singing Karaoke
09/17/2008CN201117290Y MP3 and MP4 player with bank note checking function
09/17/2008CN201117289Y Bathroom music player
09/17/2008CN201117288Y Storage device with sound control input function
09/17/2008CN201117287Y Automatic switching device for inside and outside memory
09/17/2008CN201117218Y Automatic control advertisement broadcast device
09/17/2008CN201117217Y Electronic advertisement visiting card
09/17/2008CN201117117Y Wall hanging type intelligent voice teaching system
09/17/2008CN101266830A Semiconductor memory device
09/17/2008CN101266829A Memory card, memory system including the same, and operating method thereof
09/17/2008CN101266828A Mixed flash memory device and its operation method
09/17/2008CN101266827A Portable memory apparatus having a content protection function and method of manufacturing the same
09/17/2008CN100419914C Apparatus and method for a memory storage cell leakage cancellation scheme
09/17/2008CN100419911C Power-up circuit in semiconductor memory device
09/17/2008CN100419901C Memory device having different burst order addressing for read and write operations
09/17/2008CN100419900C Method and architecture for refreshing a 1t memory proportional to temperature
09/17/2008CN100419792C Data storage device and control apparatus, data storage control method, and program
09/16/2008US7426675 Dynamic random access memory having at least two buffer registers and method for controlling such a memory
09/16/2008US7426254 Shift register comprising electrical fuse and related method
09/16/2008US7426150 Sense amplifier overdriving circuit and semiconductor device using the same
09/16/2008US7426149 Semiconductor memory module and semiconductor memory device
09/16/2008US7426148 Method and apparatus for identifying short circuits in an integrated circuit device
09/16/2008US7426145 Synchronous semiconductor memory device having on-die termination circuit and on-die termination method
09/16/2008US7426144 Semiconductor storage device
09/16/2008US7426136 Non volatile memory
09/16/2008US7426132 Static random access memory device having a high-bandwidth and occupying a small area
09/12/2008WO2008109772A1 Read disturb reduction circuit for spin transfer torque magnetoresistive random access memory
09/12/2008WO2008106778A1 Partial block erase architecture for flash memory
09/12/2008WO2008079910A3 Strobe acquisition and tracking
09/12/2008WO2008070978A9 Memory system and method with serial and parallel modes
09/12/2008CA2678886A1 Partial block erase architecture for flash memory
09/11/2008US20080222337 Pipeline accelerator having multiple pipeline units and related computing machine and method
09/11/2008US20080222329 I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures
09/11/2008US20080219075 Control of inputs to a memory device
09/11/2008US20080219074 Abbreviated Burst Data Transfers for Semiconductor Memory
09/11/2008US20080219073 Semiconductor memory device and method for driving the same
09/11/2008US20080219072 Method and apparatus for a dynamic semiconductor memory with compact sense amplifier circuit
09/11/2008US20080219071 Data flow scheme for low power DRAM
09/11/2008US20080219069 Device threshold calibration through state dependent burnin
09/11/2008US20080219068 Zq calibration controller and method for zq calibration
09/11/2008US20080219067 Individual i/o modulation in memory devices
09/11/2008US20080219066 Memory system and method ensuring read data stability
09/11/2008US20080219065 Delay locked loop circuit for a synchronous semiconductor memory device and a method of generating information about a load connected to a data pin of a synchronous semiconductor memory device
09/11/2008US20080219064 Semiconductor memory apparatus with write training function
09/11/2008US20080219063 System and method of selective row energization based on write data
09/11/2008US20080219062 Semiconductor memory device
09/11/2008US20080219060 Device and method for internal voltage monitoring
09/11/2008US20080219052 Always-evaluated zero standby-current programmable non-volatile memory
09/11/2008US20080219047 Apparatus and method for writing data to phase-change memory by using power calculation and data inversion
09/11/2008US20080219046 Writing method and system for a phase change memory
09/11/2008US20080219044 Read Disturb Reduction Circuit for Spin Transfer Torque Magnetoresistive Random Access Memory
09/11/2008DE10258131B4 Halbleiterspeicherbauelement und zugehöriges Schreib-/Leseverfahren The semiconductor memory device and associated write / read process
09/11/2008DE10252491B4 Verzögerungsregelkreisschaltung und -verfahren Delay locked loop circuit and method
09/11/2008DE10215583B4 Spannungsgeneratorvorrichtung und Steuerverfahren Voltage generator apparatus and control method
09/11/2008DE102008005864A1 Abtastverstärker, Halbleiterspeicherbauelement und Verfahren zum Betreiben eines Abtastverstärkers Sense amplifiers, semiconductor memory device and method of operating a sense amplifier
09/11/2008DE102006008492B4 Speicherschaltung mit einer Widerstandsspeicherzelle und Verfahren zum Betreiben einer solchen Speicherschaltung Memory circuit having a resistive memory cell and method of operating such a memory circuit
09/11/2008DE102006001492B4 Halbleiterspeicheranordnung und Verfahren zum Betreiben einer Halbleiterspeicheranordnung A semiconductor memory device and method of operating a semiconductor memory arrangement
09/11/2008DE102005058438B4 Integrierter Halbleiterspeicher mit Ermittelung einer Chiptemperatur Integrated semiconductor memory with a chip temperature determination
09/11/2008DE102005057169B4 Variable Pipeline-Schaltung Variable pipeline circuit
09/11/2008DE102005053916B4 Synchronisationsschaltung für einen Schreibvorgang auf einen Halbleiterspeicher Synchronization circuit for a write operation to a semiconductor memory
09/11/2008DE102005053717B4 Erfass-Verstärker-Bitleitungs-Verstärkungs-Schaltkreis Sense amplifier bit line boost circuit
09/10/2008EP1968070A1 Memory controller
09/10/2008EP1966801A2 Reference sense amplifier and method for compensated sensing in non-volatile memory
09/10/2008EP1644936B1 Flash/dynamic random access memory field programmable gate array
09/10/2008EP1016511B1 Molded body of thermoplastic resin having sound absorption characteristics