Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 7 - Arrangements for writing information into, or reading information out from, a digital store
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
12/2008
12/31/2008CN100447896C Semiconductor memory device
12/31/2008CN100447894C MRAM having memory cell array in which cross-point memory cells are arranged by hierarchical bit line scheme and data read method thereof
12/31/2008CN100447756C Code transmitter especially for memorizer controller
12/31/2008CN100447726C Mobile terminal having jog dial and controlling method thereof
12/30/2008US7472325 Method for segmenting BIST functionality in an embedded memory array into remote lower-speed executable instructions and local higher-speed executable instructions
12/30/2008US7471988 Method and apparatus for automatic equalization mode activation
12/30/2008US7471878 Playback program
12/30/2008US7471589 Semiconductor memory devices, block select decoding circuits and method thereof
12/30/2008US7471587 Semiconductor memory
12/30/2008US7471586 Semiconductor memory device which controls refresh of a memory array in normal operation
12/30/2008US7471585 Semiconductor memory
12/30/2008US7471584 Integrated semiconductor memory and method for operating an integrated semiconductor memory
12/30/2008US7471583 Memory device with self refresh cycle control function
12/30/2008US7471582 Memory circuit using a reference for sensing
12/30/2008US7471581 Wide dynamic range and high speed voltage mode sensing for a multilevel digital non-volatile memory
12/30/2008US7471580 Flip-flop with additional state storage in the event of turn-off
12/30/2008US7471578 Internal voltage generation control circuit and internal voltage generation circuit using the same
12/30/2008US7471577 Voltage generator and methods thereof
12/30/2008US7471576 Method of transferring data in an electrically programmable memory
12/30/2008US7471575 Non-volatile memory and method with shared processing for an aggregate of read/write circuits
12/30/2008US7471574 Branch target buffer and method of use
12/30/2008US7471573 Integrated circuit device and electronic instrument
12/30/2008US7471542 Information storage apparatus storing and reading information by irradiating a storage medium with electron beam
12/30/2008US7471541 Memory transistor gate oxide stress release and improved reliability
12/30/2008US7471332 Imaging device having a capability of checking connection with a flash unit, flash unit having a capability of checking connection with an imaging device, and system including an imaging device and a flash unit and having a capability of checking connection between the imaging device and the flash unit
12/30/2008US7471129 Device for utilization with the synchronization of clock signals, and clock signal synchronizing method
12/25/2008US20080320175 Methods and apparatus for identifying operating modes for peripheral devices
12/25/2008US20080316849 Memory driving method and semiconductor storage device
12/25/2008US20080316848 Semiconductor memory device and driving method therefor
12/25/2008US20080316847 Sensing circuit of a phase change memory and sensing method thereof
12/25/2008US20080316844 Selection method of bit line redundancy repair and apparatus performing the same
12/25/2008US20080316843 Semiconductor memory device capable of operating in a plurality of operating modes and method for controlling thereof
12/25/2008US20080316842 System, method, and computer program product for broadcasting write operations
12/25/2008US20080316841 Memory device having data paths with multiple speeds
12/25/2008US20080316840 Input/output line sense amplifier and semiconductor memory device using the same
12/25/2008US20080316839 Memory cell array and method of controlling the same
12/25/2008US20080316838 Redundancy memory cell access circuit and semiconductor memory device including the same
12/25/2008US20080316837 Semiconductor memory device capable of controlling potential level of power supply line and/or ground line
12/25/2008US20080316836 Ground biased bitline register file
12/25/2008US20080316835 Concurrent Multiple-Dimension Word-Addressable Memory Architecture
12/25/2008US20080316834 Bias circuits and methods for enhanced reliability of flash memory device
12/25/2008US20080316830 Compensation method to achieve uniform programming speed of flash memory devices
12/25/2008US20080316825 Semiconductor memory device
12/25/2008US20080316816 Systems for programming multilevel cell nonvolatile memory
12/25/2008US20080316810 Memory unit
12/25/2008US20080316806 Phase change memory device
12/25/2008US20080316805 Electronic Circuit With a Memory Matrix
12/25/2008US20080316803 Sensing circuit of a phase change memory and sensing method thereof
12/25/2008US20080316801 Magnetic Memory System Using Mram-Sensor
12/25/2008US20080316799 Read-Preferred SRAM Cell Design
12/25/2008US20080316798 Nonvolatile semiconductor memory device
12/25/2008US20080316792 Circuit for programming a memory element
12/25/2008US20080316791 Operating method of one-time programmable read only memory
12/25/2008US20080316788 Semiconductor memory device and method for operating semiconductor memory device
12/24/2008WO2008157002A1 Quantizing circuits with variable reference signals
12/24/2008WO2008157000A1 Delta sigma sense amplifier comprising digital filters and memory
12/24/2008WO2008156999A1 Digital filters for semiconductor devices
12/24/2008EP2006774A1 Smart card storage system and file management method therein
12/24/2008EP2005434A1 Electronic circuit that comprises a memory matrix and method of reading for bitline noise compensation
12/24/2008EP1665275A4 Method and apparatus for read bitline clamping for gain cell dram devices
12/24/2008DE102008026098A1 Verfahren und Vorrichtung zum Modifizieren einer Burstlänge für einen Halbleiterspeicher Method and apparatus for modifying a burst length for a semiconductor memory
12/24/2008DE10058231B4 Datensynchronisationsschaltung und diese enthaltendes Mehrfachbank-Speicherbauelement Data synchronization circuit and these containing multiple bank memory device
12/24/2008DE10036446B4 Vorrichtung zum Erzeugen einer Speicheradresse, Mobilstation und Verfahren zum Schreiben/Lesen von Daten An apparatus for generating a memory address, mobile station and method of writing / reading data
12/24/2008CN201171252Y Portable memory device
12/24/2008CN201170960Y Charging device for locating numeral products externally
12/24/2008CN201170930Y Book capable of phonating
12/24/2008CN201168335Y Multimedia health massage instrument
12/24/2008CN201168171Y U disk health-care instrument
12/24/2008CN201167603Y Multi-functional waistband head having radio and recorder
12/24/2008CN201167602Y Multi-functional waistband head having electronic product
12/24/2008CN201167601Y Waistband head having multiple functions of products
12/24/2008CN101331758A Apparatus, method and computer program product providing synchronization of memory card operation during dvb-h reception
12/24/2008CN101331457A 同步一位接口协议或数据结构 A synchronous interface protocol or data structures
12/24/2008CN101330086A Noise suppression for open bit line DRAM architectures
12/24/2008CN101329904A Noise suppression for open bit line DRAM architectures
12/24/2008CN101329895A Case for containing a portable media player
12/24/2008CN101329894A Novel storage system
12/24/2008CN101329503A Time off-set projection machine
12/24/2008CN100446245C Stacked dram memory chip for a dual inline memory module (dimm)
12/24/2008CN100446123C Semiconductor storage device
12/24/2008CN100446116C Method and apparatus for setting and compensating read latency in a high speed DRAM
12/24/2008CN100446115C Read-only storage with lowered loading value
12/24/2008CN100445944C Control circuit and its control method
12/23/2008US7469360 Method and apparatus for testing a memory device
12/23/2008US7468926 Partial erase verify
12/23/2008US7468925 Semiconductor memory device realizing high-speed access
12/23/2008US7468924 Non-volatile memory device capable of reducing threshold voltage distribution
12/23/2008US7468923 Semiconductor integrated circuit
12/23/2008US7468901 Semiconductor memory device
12/18/2008WO2008153652A2 Reference clock and command word alignment
12/18/2008US20080313419 Method and system for buffering data file to buffer memory
12/18/2008US20080310245 Digital filters for semiconductor devices
12/18/2008US20080310244 Digital filters with memory
12/18/2008US20080310243 Semiconductor memory device for reducing precharge time
12/18/2008US20080310242 Systems for programmable chip enable and chip address in semiconductor memory
12/18/2008US20080310241 Semiconductor memory device having memory cell and reference cell connected to same sense amplifier and method of reading data thereof
12/18/2008US20080310240 Semiconductor memory device having I/O unit
12/18/2008US20080310239 Device for writing data into memory and method thereof
12/18/2008US20080310236 Subtraction circuits and digital-to-analog converters for semiconductor devices
12/18/2008US20080310234 Nonvolatile memory device and methods of programming and reading the same
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