| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
|---|
| 06/09/1998 | US5764563 Static random access memory cell |
| 06/09/1998 | US5764562 Semiconductor memory device |
| 06/09/1998 | US5764561 Ferroelectric memory devices and method of using ferroelectric capacitors |
| 06/09/1998 | US5764090 Write-control circuit for high-speed static random-access-memory (SRAM) devices |
| 06/09/1998 | US5763928 Hall effect modulation of resistor values |
| 06/09/1998 | US5763908 Semiconductor memory device having an interconnect structure which improves yield |
| 06/04/1998 | WO1998024184A1 Adjustable output driver circuit |
| 06/04/1998 | WO1998024163A2 Multiple magnetic tunnel structures |
| 06/04/1998 | DE19731714A1 Integrated circuit for gate array, embedded cell array |
| 06/04/1998 | DE19729601A1 Semiconductor DRAM component with resistance element having interference security |
| 06/04/1998 | DE19719670A1 Semiconductor memory with MOS and bipolar transistors for SCRAM cells |
| 06/04/1998 | DE19610555C2 Leckspannungs-Detektorschaltung für einen MOS Kondensator Leak voltage detection circuit for a MOS capacitor |
| 06/04/1998 | CA2270896A1 Multiple magnetic tunnel structures |
| 06/03/1998 | EP0845788A2 A memory array test circuit with failure notification |
| 06/03/1998 | EP0845784A1 Method and corresponding circuit for generating a syncronization ATD signal |
| 06/03/1998 | CN1183647A Acceleration test method of semiconductor memory |
| 06/02/1998 | US5761703 Apparatus and method for dynamic memory refresh |
| 06/02/1998 | US5761694 Multi-bank memory system and method having addresses switched between the row and column decoders in different banks |
| 06/02/1998 | US5761222 Memory device having error detection and correction function, and methods for reading, writing and erasing the memory device |
| 06/02/1998 | US5761151 Pulse generator for generating a plurality of output pulses in response to an input pulse |
| 06/02/1998 | US5761150 Synchronous memory with pipelined write operation |
| 06/02/1998 | US5761149 Dynamic RAM |
| 06/02/1998 | US5761147 Virtual two-port memory structure with fast write-thru operation |
| 06/02/1998 | US5761146 Data in/out channel control circuit of semiconductor memory device having multi-bank structure |
| 06/02/1998 | US5761143 Using an output of a leak detector which detects leakage from a dummy memory cell to control a subtrate voltage in a semi conductor memory device |
| 06/02/1998 | US5761142 Semiconductor memory device having sense amplifier drivers disposed on center portion of cell array block |
| 06/02/1998 | US5761141 Semiconductor memory device and test method therefor |
| 06/02/1998 | US5761138 Memory devices having a flexible redundant block architecture |
| 06/02/1998 | US5761137 DRAM access system and method |
| 06/02/1998 | US5761136 Circuit for generating a column switch enable signal of a memory |
| 06/02/1998 | US5761135 Sub-word line drivers for integrated circuit memory devices and related methods |
| 06/02/1998 | US5761134 Data reading circuit |
| 06/02/1998 | US5761117 Non-volatile multi-state memory device with memory cell capable of storing multi-state data |
| 06/02/1998 | US5761114 Multi-level storage gain cell with stepline |
| 06/02/1998 | US5761113 Soft error suppressing resistance load type SRAM cell |
| 06/02/1998 | US5761110 Memory cell capable of storing more than two logic states by using programmable resistances |
| 06/02/1998 | US5761109 Semiconductor memory device having folded bit line array and an open bit line array with imbalance correction |
| 06/02/1998 | US5761108 In a dynamic random access memory array |
| 06/02/1998 | US5760791 Graphic RAM having a dual port and a serial data access method thereof |
| 06/02/1998 | US5760607 System comprising field programmable gate array and intelligent memory |
| 06/02/1998 | US5760602 Time multiplexing a plurality of configuration settings of a programmable switch element in a FPGA |
| 05/28/1998 | WO1998023032A1 An address transition detection circuit |
| 05/27/1998 | EP0844679A1 Magneto-resistance effect element, magneto-resistance effect type head, memory element, and method for manufacturing them |
| 05/27/1998 | EP0844671A1 Semiconductor element and semiconductor memory device using the same |
| 05/27/1998 | EP0844618A1 Data reading method for ferroelectric memory, and ferroelectric memory |
| 05/27/1998 | EP0844617A2 Improvements in or relating to electronic circuits |
| 05/27/1998 | EP0844616A2 Semiconductor memory device |
| 05/27/1998 | EP0843901A1 Electrically erasable, directly overwritable, multibit single cell memory elements and arrays fabricated therefrom |
| 05/27/1998 | CN1183166A Ferroelectric storage device |
| 05/27/1998 | CN1183165A Data reading method for perroelectric memory, and ferroelectric memory |
| 05/27/1998 | CN1182939A Not easily lost storage device |
| 05/27/1998 | CN1182938A 半导体电路装置 The semiconductor circuit device |
| 05/27/1998 | CN1182917A Microprocessor |
| 05/26/1998 | US5758148 System and method for searching a data base using a content-searchable memory |
| 05/26/1998 | US5757809 Semiconductor memory device |
| 05/26/1998 | US5757719 Page-mode memory device with multiple-level memory cells |
| 05/26/1998 | US5757716 Integrated circuit memory devices and methods including programmable block disabling and programmable block selection |
| 05/26/1998 | US5757715 Method for initializing and reprogramming a control operation feature of a memory device |
| 05/26/1998 | US5757714 Semiconductor memory device with on-chip boosted power supply voltage generator |
| 05/26/1998 | US5757713 Adjustable write voltage circuit for SRAMS |
| 05/26/1998 | US5757711 Amplifier circuit and complementary amplifier circuit with limiting function for output lower limit |
| 05/26/1998 | US5757710 DRAM with edge sense amplifiers which are activated along with sense amplifiers internal to the array during a read cycle |
| 05/26/1998 | US5757707 Semiconductor memory device |
| 05/26/1998 | US5757706 Dynamic leaker for bit line refresh |
| 05/26/1998 | US5757705 SDRAM clocking test mode |
| 05/26/1998 | US5757704 Semiconductor memory integrated circuit with simplified circuit structure |
| 05/26/1998 | US5757703 Distributed write data drivers for burst access memories |
| 05/26/1998 | US5757702 Data holding circuit |
| 05/26/1998 | US5757701 Semiconductor memory device having serial access port |
| 05/26/1998 | US5757699 Programming which can make threshold voltages of programmed memory cells have a narrow distribution in a nonvolatile semiconductor memory |
| 05/26/1998 | US5757696 Fast accessible non-volatile semiconductor memory device |
| 05/26/1998 | US5757695 Mram with aligned magnetic vectors |
| 05/26/1998 | US5757694 Balanced resistance load type SRAM cell |
| 05/26/1998 | US5757693 Gain memory cell with diode |
| 05/26/1998 | US5757692 Semiconductor memory device |
| 05/26/1998 | US5757690 Embedded ROM with RAM valid bits for fetching ROM-code updates from external memory |
| 05/26/1998 | US5757689 Semiconductor memory activated by plurality of word lines on same row |
| 05/26/1998 | US5757225 Voltage generation circuit that can stably generate intermediate potential independent of threshold voltage |
| 05/26/1998 | US5757222 Transmission circuit |
| 05/26/1998 | US5757175 Constant current generating circuit |
| 05/26/1998 | US5757056 Multiple magnetic tunnel structures |
| 05/26/1998 | US5757051 Static memory cell and method of manufacturing a static memory cell |
| 05/26/1998 | US5757044 Electrically erasable and programmable read only memory cell with split floating gate for preventing cell from over-erase |
| 05/26/1998 | US5757042 High density ferroelectric memory with increased channel modulation and double word ferroelectric memory cell for constructing the same |
| 05/26/1998 | US5756366 Magnetic hardening of bit edges of magnetoresistive RAM |
| 05/20/1998 | EP0843399A2 Battery backed configurable output buffer |
| 05/20/1998 | EP0843261A2 Virtual channel memory system |
| 05/20/1998 | EP0842537A2 Programmable, non-volatile memory device, and method of manufacturing such a device |
| 05/20/1998 | DE19744620A1 Signal transmission system for LSI chips |
| 05/20/1998 | DE19743555A1 Nonvolatile memory device |
| 05/20/1998 | DE19730347A1 Static semiconductor memory with several memory cells |
| 05/20/1998 | DE19727789A1 Semiconductor circuit with internal voltage supply circuit for DRAM, SRAM |
| 05/20/1998 | CN1182271A Semiconductor memory device and method of reading datain semiconductor momory device |
| 05/20/1998 | CN1182262A Magnetoresistance effect element |
| 05/20/1998 | CN1038460C Voltage stabilizer |
| 05/19/1998 | US5754838 Synchronous dynamic memory device capable of operating over wide range of operation frequencies |
| 05/19/1998 | US5754819 Low-latency memory indexing method and structure |
| 05/19/1998 | US5754566 Method and apparatus for correcting a multilevel cell memory by using interleaving |
| 05/19/1998 | US5754557 Method for refreshing a memory, controlled by a memory controller in a computer system, in a self-refresh mode while scanning the memory controller |
| 05/19/1998 | US5754489 Serial access memory apparatus |