Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
07/2003
07/30/2003CN1433027A Drive capacity setting method and program and its driver circuit
07/30/2003CN1433026A Semiconductor memroy containing delay circuit capable of generating sufficiently stable delay signal
07/30/2003CN1433025A AC timing parameter controlling circuit and method for semiconductor memory equipment
07/30/2003CN1433024A Reluctance RAM method and device with automatically determined optimized write current
07/30/2003CN1433023A Magnetic film memory device with redundant repair function
07/30/2003CN1433022A High-density magnetic RAM and its operation method
07/30/2003CN1433021A 磁存储器 Magnetic memory
07/30/2003CN1433020A 磁存储器 Magnetic memory
07/30/2003CN1433010A Improved electron emitting device for data storage application and its making method
07/30/2003CN1116683C Read amplifier circuit
07/30/2003CN1116682C Data output buffer circuit of semiconductor memory device
07/29/2003US6601218 Semiconductor integrated circuit device
07/29/2003US6601191 Apparatus and method for detecting over-programming condition in multistate memory device
07/29/2003US6600693 Method and circuit for driving quad data rate synchronous semiconductor memory device
07/29/2003US6600691 High frequency range four bit prefetch output data path
07/29/2003US6600690 Sense amplifier for a memory having at least two distinct resistance states
07/29/2003US6600688 Semiconductor memory and method of operating the same
07/29/2003US6600684 Semiconductor storage device
07/29/2003US6600681 Method and apparatus for calibrating DQS qualification in a memory controller
07/29/2003US6600677 Memory circuit capable of simultaneous writing and refreshing on the same column and a memory cell for application in the same
07/29/2003US6600676 Nonvolatile semiconductor memory device with a ROM block settable in the write or erase inhibit mode
07/29/2003US6600675 Reference circuit in ferroelectric memory and method for driving the same
07/29/2003US6600674 Ferroelectric memory device including a controller
07/29/2003US6600671 Reduced area sense amplifier isolation layout in a dynamic RAM architecture
07/29/2003US6600360 Semiconductor integrated circuit
07/29/2003US6600354 Clock control method and circuit
07/29/2003US6600342 Column decoder of semiconductor memory device
07/29/2003US6600336 Signal transmission system
07/29/2003US6600186 Process technology architecture of embedded DRAM
07/29/2003US6600184 System and method for improving magnetic tunnel junction sensor magnetoresistance
07/24/2003WO2003060921A1 Memory cell circuit, memory device, motion vector detection device, and motion compensation prediction coding device.
07/24/2003WO2003060920A1 Spatial light modulator with charge-pump pixel cell
07/24/2003WO2003060919A2 Resistive memory elements with reduced roughness
07/24/2003US20030140290 Synchronous semiconductor device, and inspection system and method for the same
07/24/2003US20030139011 Multigate semiconductor device with vertical channel current and method of fabrication
07/24/2003US20030137892 Semiconductor memory device
07/24/2003US20030137889 Method for discharging word line and semicondcutor memory device using the same
07/24/2003US20030137888 Techniques of recovering data from memory cells affected by field coupling with adjacent memory cells
07/24/2003US20030137883 Half power supply voltage generator and semiconductor memory device using the same
07/24/2003US20030137877 Noise reduction technique for transistors and small devices utilizing an episodic agitation
07/24/2003US20030137876 Nonvolatile semiconductor memory device
07/24/2003US20030137872 Semiconductor memory device and storage method thereof
07/24/2003US20030137871 Three terminal magnetic random access memory
07/24/2003US20030137870 Magnetic memory
07/24/2003US20030137869 Programmable microelectronic device, structure, and system and method of forming the same
07/24/2003US20030137868 Magneto-resistive device having soft reference layer
07/24/2003US20030137867 Junction-isolated depletion mode ferroelectric memory devices
07/24/2003US20030137866 Ferroelectric nonvolatile semi-conductor memory, and its driving method
07/24/2003US20030137865 Non-volatile passive matrix device and method for readout of the same
07/24/2003US20030137864 System and method for determining the logic state of a memory cell in a magnetic tunnel junction memory device
07/24/2003US20030137863 Semiconductor device
07/24/2003US20030137501 Spatial light modulator with charge-pump pixel cell
07/24/2003US20030136978 Semiconductor memory device using vertical-channel transistors
07/24/2003US20030136976 Nonvolatile semiconductor memory with a page mode
07/23/2003EP1329904A2 Magnetoresistive random access memory devices
07/23/2003EP1329901A1 Memory cell with fuse element
07/23/2003EP1329898A2 Techniques of recovering data from memory cells affected by field coupling with adjacent memory cells
07/23/2003EP1329897A2 Low power sram
07/23/2003EP1329896A1 Semiconductor memory and control method
07/23/2003EP1329895A2 High-density magnetic random access memory device and method of operating the same
07/23/2003EP1328979A1 A memory device and a memory array
07/23/2003EP1328942A1 Method and system for hiding refreshes in a dynamic random access memory
07/23/2003CN1432181A Page mode erase in flash memory array
07/23/2003CN1432178A Quantum magnetic memory
07/23/2003CN1431778A 触发器电路 Flip-flop circuit
07/23/2003CN1431713A Semiconductor device and its mfg. method
07/23/2003CN1431663A Magnetic RAM
07/22/2003US6598171 Integrated circuit I/O using a high performance bus interface
07/22/2003US6598139 Information processing apparatus
07/22/2003US6598116 Memory interface using only one address strobe line
07/22/2003US6597817 Orientation detection for digital cameras
07/22/2003US6597630 Synchronous semiconductor memory device with NOEMI output buffer circuit
07/22/2003US6597626 Synchronous semiconductor memory device
07/22/2003US6597624 Semiconductor memory device having hierarchical word line structure
07/22/2003US6597621 Multi-bank semiconductor memory device
07/22/2003US6597619 Actively driven VREF for input buffer noise immunity
07/22/2003US6597618 Magnetic tunnel junction magnetic random access memory
07/22/2003US6597617 Semiconductor device with reduced current consumption in standby state
07/22/2003US6597616 DRAM core refresh with reduced spike current
07/22/2003US6597615 Refresh control for semiconductor memory device
07/22/2003US6597614 Self refresh circuit for semiconductor memory device
07/22/2003US6597610 System and method for providing stability for a low power static random access memory cell
07/22/2003US6597608 Coding cell of nonvolatile ferroelectric memory device and operating method thereof, and column repair circuit of nonvolatile ferroelectric memory device having the coding cell and method for repairing column
07/22/2003US6597607 Semiconductor memory device and its operation method
07/22/2003US6597606 Charging a capacitance of a memory cell and charger
07/22/2003US6597604 Flash memory cell array and method for programming and erasing data using the same
07/22/2003US6597601 Thin film magnetic memory device conducting data read operation without using a reference cell
07/22/2003US6597600 Offset compensated sensing for magnetic random access memory
07/22/2003US6597599 Semiconductor memory
07/22/2003US6597598 Resistive cross point memory arrays having a charge injection differential sense amplifier
07/22/2003US6597597 Low temperature attaching process for MRAM components
07/22/2003US6597236 Potential detecting circuit for determining whether a detected potential has reached a prescribed level
07/22/2003US6597235 Voltage boost circuits using multi-phase clock signals
07/22/2003US6597206 256 Meg dynamic random access memory
07/22/2003US6597049 Conductor structure for a magnetic memory
07/22/2003US6597040 Semiconductor device having MOS transistor for coupling two signal lines
07/22/2003US6597036 Multi-value single electron memory using double-quantum dot and driving method thereof
07/22/2003US6597031 Ovonic unified memory device and magnetic random access memory device
07/22/2003US6596626 Method for arranging wiring line including power reinforcing line and semiconductor device having power reinforcing line
07/22/2003US6596590 Method of making multi-level type non-volatile semiconductor memory device