Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
06/2011
06/09/2011US20110134689 Magnetic recording element, magnetic memory cell, and magnetic random access memory
06/09/2011US20110134688 Asymmetric Write Current Compensation
06/09/2011US20110134687 Resistance variable memory device and method of writing data
06/09/2011US20110134686 Semiconductor devices including sense amplifier connected to word line
06/09/2011US20110134685 Energy-efficient set write of phase change memory with switch
06/09/2011US20110134684 INTEGRATED CIRCUITS WITH SPLIT GATE AND COMMON GATE FinFET TRANSISTORS
06/09/2011US20110134683 Semiconductor device
06/09/2011US20110134682 Variable write and read methods for resistive random access memory
06/09/2011US20110134681 Semiconductor memory device
06/09/2011US20110134676 Resistive memory devices having a not-and (nand) structure
06/09/2011US20110134579 Memory Device
06/09/2011US20110134193 Nozzle arrangement with an actuator having iris vanes
06/09/2011DE102004020258B4 Speicher mit einer Mehrzahl von magnetischen Speicherelementen Memory having a plurality of magnetic memory elements
06/09/2011DE10126878B4 Halbleitervorrichtung Semiconductor device
06/09/2011DE10125724B4 Speichersystem, Speicherbauelement und Speicherdatenzugriffsverfahren Memory system, the memory device and memory data access method
06/09/2011DE10054094B4 Verfahren und Vorrichtung zur Datenübertragung Method and apparatus for data transmission
06/09/2011DE10053700B4 Halbleiterspeicherbauelement mit Datenleitungspaaren The semiconductor memory device with data line pairs
06/09/2011CA2782142A1 Method and system for a run-time reconfigurable computer architecture
06/08/2011EP2330595A1 Iterative charging of a memory cell based on a reference cell value
06/08/2011EP2330594A1 Non volatile logic devices using magnetic tunnel junctions
06/08/2011EP2330593A1 Analog interface for a flash memory chip
06/08/2011EP2330592A1 8-bit or more A/D conversion for the determination of a NAND memory cell value
06/08/2011EP2330591A1 Closed-loop soft error rate sensitivity control
06/08/2011EP2329498A1 Dual power scheme in memory circuit
06/08/2011EP2329495A1 Systems and methods for handling negative bias temperature instability stress in memory bitcells
06/08/2011CN201859658U Embedded SDRAM (synchronous dynamic random access memory) module
06/08/2011CN1933028B Nand flash memory device with burst read latency function
06/08/2011CN1820323B Skewed sense amplier for variable resistance memory sensing
06/08/2011CN1739163B 浮动栅电路 Floating gate circuit
06/08/2011CN1729539B Method and device for protection of an MRAM device against tampering
06/08/2011CN1670858B Memory module
06/08/2011CN102089881A Methods for fabricating gated lateral thyristor-based random access memory (GLTRAM) cells
06/08/2011CN102087876A Energy-efficient set write of phase change memory with switch
06/08/2011CN102087875A Static random access memory
06/08/2011CN102087874A General memory input and output generating device and method
06/08/2011CN102087873A Method of controlling a DRAM memory cell having a second control gate
06/08/2011CN101546601B Solid state disk and memory system
06/08/2011CN101409102B Semiconductor memory apparatus
06/08/2011CN101369597B Multi-level memory cell having phase change element and asymmetrical thermal boundary
06/08/2011CN101308903B Phase-change memory element
06/08/2011CN101140799B Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements
06/08/2011CN101110467B Phase change memory cell having step-like programming characteristic
06/08/2011CN101106174B Method for reducing a reset current of phase change memory device
06/08/2011CN101015023B Cross-point ferroelectric memory that reduces the effects of bit line to word line shorts
06/07/2011US7958288 Semiconductor storage device and method of controlling the same
06/07/2011US7958287 Semiconductor storage device and method of controlling the same
06/07/2011US7957215 Method and apparatus for generating temperature-compensated read and verify operations in flash memories
06/07/2011US7957211 Method and apparatus for synchronization of row and column access operations
06/07/2011US7957201 Flash memory device operating at multiple speeds
06/07/2011US7957192 Read and volatile NV standby disturb
06/07/2011US7957189 Drift compensation in a flash memory
06/07/2011US7957186 Non-volatile memory system and data read method of non-volatile memory system
06/07/2011US7957185 Non-volatile memory and method with power-saving read and program-verify operations
06/07/2011US7957184 Magnetoresistive element and magnetoresistive random access memory including the same
06/07/2011US7957183 Single bit line SMT MRAM array architecture and the programming method
06/07/2011US7957182 Memory cell having nonmagnetic filament contact and methods of operating and fabricating the same
06/07/2011US7957181 Magnetic tunnel junction magnetic memory
06/07/2011US7957180 Phase change memory device having decentralized driving units
06/07/2011US7957179 Magnetic shielding in magnetic multilayer structures
06/07/2011US7957178 Storage cell having buffer circuit for driving the bitline
06/07/2011US7957177 Static random-access memory with boosted voltages
06/07/2011US7957176 Semiconductor memory device with improved resistance to disturbance and improved writing characteristic
06/07/2011US7957009 Image sensing and printing device
06/07/2011US7956397 Semiconductor device, charge pumping circuit, and semiconductor memory circuit
06/03/2011WO2011066584A1 Resistance based memory circuit with digital sensing
06/03/2011WO2011066324A2 Magnetic tunnel junction device and fabrication
06/03/2011WO2011066235A1 Programming memory with direct bit line driving to reduce channel-to-floating gate coupling
06/03/2011WO2011066234A1 Programming non-volatile memory with reduced number of verify operations
06/03/2011WO2011066228A1 Programming memory with sensing-based bit line compensation to reduce channel -to-floating gate coupling
06/03/2011WO2011066225A1 Programming memory with bit line floating to reduce channel-to-floating gate coupling
06/03/2011WO2011065258A1 Semiconductor device
06/03/2011WO2011064626A1 Method for compensating a timing signal, an integrated circuit and electronic device
06/03/2011WO2011064624A1 Bypass capacitor circuit and method of providing a bypass capacitance for an integrated circuit die
06/02/2011US20110131446 Semiconductor device and data processing system including the same
06/02/2011US20110128781 Semiconductor memory circuit
06/02/2011US20110128780 Semiconductor device
06/02/2011US20110128779 Memory including a selector switch on a variable resistance memory cell
06/02/2011US20110128778 Predictive Thermal Preconditioning and Timing Control for Non-Volatile Memory Cells
06/02/2011US20110128777 Semiconductor device
06/02/2011US20110128776 Nonvolatile memory device and method of writing data to nonvolatile memory device
06/02/2011US20110128775 Nonvolatile semiconductor storage device and data writing method therefor
06/02/2011US20110128774 Nonvolatile semiconductor memory device
06/02/2011US20110128773 Nonvolatile variable resistance memory element writing method, and nonvolatile variable resistance memory device
06/02/2011US20110128772 Nonvolatile memory cells and nonvolatile memory devices including the same
06/02/2011US20110128771 Resistance Based Memory Circuit With Digital Sensing
06/02/2011US20110128770 Stored multi-bit data characterized by multiple-dimensional memory states
06/02/2011US20110128769 Data holding device
06/02/2011US20110128766 Programmable Resistance Memory
06/02/2011US20110127609 Semiconductor memory device
06/01/2011EP2328180A1 Tunneling magnetoresistive element, semiconductor junction element, magnetic memory and semiconductor light emitting element
06/01/2011EP1484766B1 Magnetic storage unit using ferromagnetic tunnel junction element
06/01/2011DE10338980B4 Rücksetzsignalgenerator, Halbleiterspeicherbaustein und Rücksetzverfahren Reset signal generator, the semiconductor memory device and resetting method
06/01/2011DE102004063531B4 Halbleiter-Speicherbauelement, System mit Halbleiter-Speicherbauelement, und Verfahren zum Betrieb eines Halbleiter-Speicherbauelements A semiconductor memory device, system semiconductor memory device, and method for operating a semiconductor memory device
06/01/2011DE102004058131B4 Verfahren und Schaltung zum Auslesen einer dynamischen Speicherschaltung Method and circuit for reading a dynamic memory circuit
06/01/2011DE102004052803B4 Halbleiterbauelement mit Lesesignalgenerator und zugehöriges Datenleseverfahren A semiconductor device comprising read signal generator and related data reading method
06/01/2011DE10061769B4 Halbleiterspeicherbaustein A semiconductor memory device
06/01/2011CN1856836B Mram array with segmented magnetic write lines
06/01/2011CN1652248B Method and memory system in which operating mode is set using address signal
06/01/2011CN102084428A Multi-mode memory device and method
06/01/2011CN102084427A Gated lateral thyristor-based random access memory (GLTRAM) cells with separate read and write access transistors, memory devices and integrated circuits incorporating the same