| Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043) |
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| 05/19/1993 | EP0541685A1 Associative memory. |
| 05/19/1993 | EP0541684A1 Bit storage cell. |
| 05/19/1993 | EP0541683A1 Reduction processor. |
| 05/19/1993 | EP0541682A1 A method for performing arithmetic, logical and related operations and a numerical arithmetic unit. |
| 05/19/1993 | EP0541678A1 An arithmetic unit for structure arithmetic. |
| 05/19/1993 | EP0541537A1 Method and apparatus for high precision weighted random pattern generation. |
| 05/19/1993 | CN1020806C Parallel multiplier using skip array and modified wallace tree |
| 05/18/1993 | US5212782 Automated method of inserting pipeline stages in a data path element to achieve a specified operating frequency |
| 05/18/1993 | US5212697 Variable length character string detection apparatus |
| 05/18/1993 | US5212662 Floating point arithmetic two cycle data flow |
| 05/18/1993 | US5212661 Apparatus for performing floating point arithmetic operation and rounding the result thereof |
| 05/18/1993 | US5212652 Programmable gate array with improved interconnect structure |
| 05/18/1993 | US5212481 Circuit for code converting PCM codes |
| 05/13/1993 | DE4136960A1 Serial comparison of bit groups in data stream - comparing contents of shift register loaded with reference data to bit stream data, and storing result in flip=flop |
| 05/12/1993 | EP0541462A1 Squaring circuit for binary numbers |
| 05/11/1993 | US5210870 Database sort and merge apparatus with multiple memory arrays having alternating access |
| 05/11/1993 | US5210711 Very fast variable input multi-bit adder |
| 05/11/1993 | US5210710 Modulo arithmetic processor chip |
| 05/11/1993 | US5210529 Bit finder circuit |
| 05/11/1993 | CA1317691C Method and apparatus for deriving instantaneous reciprocals of the homogenous coordinate w for use in defining images on a display |
| 05/11/1993 | CA1317676C Address detection circuit using a memory |
| 05/05/1993 | EP0540285A2 Method and apparatus for floating point normalisation |
| 05/05/1993 | EP0540181A2 Digital multiplication and accumulation system |
| 05/05/1993 | EP0540175A2 Digital signal processing apparatus |
| 05/05/1993 | EP0540155A2 Digital limit checking system |
| 05/05/1993 | EP0540150A2 Improved arithmetic logic unit |
| 05/05/1993 | EP0344226B1 High-speed digital adding system |
| 05/04/1993 | US5208770 Accumulation circuit having a round-off function |
| 05/04/1993 | US5208769 Unsigned integer multiply/divide circuit |
| 05/04/1993 | US5208490 Functionally complete family of self-timed dynamic logic circuits |
| 04/29/1993 | WO1993008523A2 1-bit adder and multiplier containing a 1-bit adder |
| 04/28/1993 | EP0539010A2 Method and device for generating sum information/rounding control signal |
| 04/28/1993 | EP0538805A2 Circuit for producing a logical butterfly structure |
| 04/27/1993 | US5206947 Stable sorting for a sort accelerator |
| 04/27/1993 | US5206940 Address control and generating system for digital signal-processor |
| 04/27/1993 | US5206834 Semiconductor memory device performing last in-first out operation and the method for controlling the same |
| 04/27/1993 | US5206828 Special carry save adder for high speed iterative division |
| 04/27/1993 | US5206827 Iterative high radix divider decoding the upper bits of a divisor and dividend |
| 04/27/1993 | US5206826 Floating-point division cell |
| 04/27/1993 | US5206825 Arithmetic processor using signed-digit representation of external operands |
| 04/27/1993 | US5206824 Method and apparatus for exponentiation over GF(2n) |
| 04/27/1993 | US5206823 Apparatus to perform Newton iterations for reciprocal and reciprocal square root |
| 04/27/1993 | US5206821 Decimation circuit employing multiple memory data shifting section and multiple arithmetic logic unit section |
| 04/27/1993 | US5206817 Pipelined circuitry for allowing the comparison of the relative difference between two asynchronous pointers and a programmable value |
| 04/21/1993 | EP0537205A1 Device for emulating neuronal networks and process for operating it. |
| 04/20/1993 | US5204967 Sorting system using cascaded modules with levels of memory cells among which levels data are displaced along ordered path indicated by pointers |
| 04/20/1993 | US5204885 Method and device for evaluating a digital signal using a digital counter with lsb signal separately applied to both counter and register |
| 04/20/1993 | US5204832 Addition apparatus having round-off function |
| 04/20/1993 | US5204831 Circuit configuration for digital bit-serial signal processing |
| 04/20/1993 | US5204829 Interleaving operations in a floating-point numeric processor |
| 04/20/1993 | US5204828 Bus apparatus having hold registers for parallel processing in a microprocessor |
| 04/20/1993 | US5204825 Method and apparatus for exact leading zero prediction for a floating-point adder |
| 04/20/1993 | US5204671 Random one-of-N selector |
| 04/15/1993 | WO1993007692A1 Packet processing method and apparatus |
| 04/14/1993 | EP0536905A2 Random number generator |
| 04/13/1993 | US5202642 Apparatus and method for fractional frequency division |
| 04/07/1993 | EP0535395A2 Partial multiplier selector for multiplication circuit |
| 04/06/1993 | US5201047 Attribute-based classification and retrieval system |
| 04/06/1993 | US5200916 Mantissa processing circuit of floating point arithmetic apparatus for addition and subtraction |
| 04/06/1993 | US5200912 Apparatus for providing power to selected portions of a multiplying device |
| 04/06/1993 | US5200907 Transmission gate logic design method |
| 04/01/1993 | WO1993006672A1 Method and apparatus for public key exchange in a cryptographic system |
| 04/01/1993 | WO1993006552A1 Random access compare array |
| 04/01/1993 | WO1993006547A1 Maximum search circuit |
| 04/01/1993 | DE4124280A1 Arithmetic circuit only using denominational representation, in octal code - contains pulse circuit controlling parallel addition or subtraction and shift register. |
| 03/31/1993 | EP0534760A2 High speed multiplier device |
| 03/31/1993 | EP0534605A2 System for converting a floating point signed magnitude binary number to a two's compliment binary number |
| 03/31/1993 | EP0533996A1 Integrated semi-conductor memory circuit |
| 03/30/1993 | US5199073 Key hashing in data processors |
| 03/30/1993 | US5198993 Arithmetic device having a plurality of partitioned adders |
| 03/30/1993 | US5198779 Digital oscillator |
| 03/25/1993 | DE4131231A1 Electronic adder-subtractor circuit with tetrad adder and subtractor - forms its results in numeric serial manner using crossover feedback of outputs of shift register outputs to inputs |
| 03/24/1993 | EP0533337A1 Apparatus and method for resolving dependencies among a plurality of instructions within a storage device |
| 03/24/1993 | CN1070298A Apparatus and method for modulo computation |
| 03/24/1993 | CN1020170C High speed numerical processor |
| 03/23/1993 | US5197024 Method and apparatus for exponential/logarithmic computation |
| 03/23/1993 | US5197023 Hardware arrangement for floating-point addition and subtraction |
| 03/23/1993 | US5197022 Overflow detection calculator and method of overflow determination |
| 03/19/1993 | CA2078499A1 Reconfigurable fuzzy cell |
| 03/18/1993 | WO1993005471A1 Fuzzy logic controller with optimised storage organisation |
| 03/18/1993 | WO1993005470A1 Digital logic circuit for the production of fuzzy-logic operators |
| 03/18/1993 | DE4130766A1 Digital electronic adder and subtractor circuit - has one adder and two subtractors, and stores normal and contra-subtraction results in two shift registers |
| 03/18/1993 | DE4130374A1 Digital circuit for division and multiplication - combines division and multiplier circuits with control stage providing shift signals. |
| 03/17/1993 | EP0531604A1 Digital sigma-delta modulator |
| 03/17/1993 | CA2078397A1 Method of retrieving variable values in a data processing system |
| 03/16/1993 | US5195167 Apparatus and method of grouping utterances of a phoneme into context-dependent categories based on sound-similarity for automatic speech recognition |
| 03/16/1993 | US5195052 Circuit and method for performing integer power operations |
| 03/16/1993 | US5195051 Arithmetic logic |
| 03/16/1993 | US5195049 Digital filter system with anomaly detection and indication |
| 03/16/1993 | US5195044 Digital oscillator for generating a signal of controllable frequency |
| 03/16/1993 | US5195034 Method for quasi-key search within a National Language Support (NLS) data processing system |
| 03/16/1993 | CA1314594C Programmable logic device |
| 03/11/1993 | DE4129423A1 Digitale logikschaltung zur realisierung unscharfer (fuzzy logic) operatoren Operators digital logic circuit for realization of fuzzy (fuzzy logic) |
| 03/10/1993 | EP0531158A2 Method of and apparatus for encryption and decryption of communication data |
| 03/10/1993 | EP0530936A1 Method and apparatus for performing prescaled division |
| 03/10/1993 | EP0530372A1 Numerical expression converter and vector processor using the same |
| 03/09/1993 | US5193207 Link sorted memory |
| 03/09/1993 | US5193203 System for rearranging sequential data words from an initial order to an arrival order in a predetermined order |
| 03/09/1993 | US5193070 Transversal filter circuit having tap circuits including bidirectional shift registers for serial multiplication |
| 03/09/1993 | US5192882 Logic operation circuit |