Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043) |
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12/30/1991 | CA2046020A1 High-performance multi-processor having floating point unit |
12/30/1991 | CA2044052A1 Pattern matching circuit |
12/27/1991 | EP0462682A2 Programmable logic array using emitter-coupled logic and input buffer |
12/26/1991 | WO1991020028A1 Universal galois field multiplier |
12/26/1991 | WO1991020027A1 Method and apparatus for a special purpose arithmetic boolean unit |
12/24/1991 | US5075882 Normalizing circuit of floating-point arithmetic circuit for two input data |
12/24/1991 | US5075879 Absolute value decoder |
12/19/1991 | DE4019398A1 Electronic multiplier circuit using tetrade adders - has results shift register with single shifting direction and extended interval for formation of product value |
12/18/1991 | EP0461983A1 Secrets transfer method, by exchange of two certifiers between two microcomputers, authenticating one another |
12/18/1991 | EP0461241A1 Binary floating point arithmetic rounding in conformance with ieee 754-1985 standard |
12/18/1991 | EP0461240A1 Methods and apparatus for efficient resource allocation for error and exception handling in convergent division |
12/18/1991 | EP0461230A1 Method and processor for high-speed convergence factor determination |
12/18/1991 | EP0461214A1 METHOD AND APPARATUS FOR HIGH SPEED DETERMINATION OF J?th ROOTS AND RECIPROCALS OF J?th ROOTS. |
12/17/1991 | US5073909 Method of simulating the state of a linear feedback shift register |
12/17/1991 | US5073870 Modular multiplication method and the system for processing data |
12/17/1991 | US5073867 Digital neural network processing elements |
12/17/1991 | US5073864 Parallel string processor and method for a minicomputer |
12/17/1991 | US5072822 Article sorting system |
12/17/1991 | CA1293333C Buffer address register |
12/12/1991 | WO1991019249A1 Universal multiplier-accumulator |
12/12/1991 | DE4018431A1 Electronic multiplier circuit - eliminates errors in certain stages and uses one additional flip=flop for control stage B-mode operation |
12/12/1991 | DE4018030A1 Electronic divider circuit - has pulse circuit with two outputs driving subtractors, and eliminates re-addition of divisor |
12/12/1991 | DE4018029A1 Electronic multiplier circuit - has control stage to minimise required number of parallel additions |
12/11/1991 | EP0460353A2 Symmetrical ratio decoders for binary division |
12/11/1991 | EP0460098A1 Serial word comparator |
12/11/1991 | CN1056939A Parallel multiplier using skip array and modified wallace tree |
12/10/1991 | US5072419 Binary tree multiplier constructed of carry save adders having an area efficient floor plan |
12/10/1991 | US5072418 Series maxium/minimum function computing devices, systems and methods |
12/10/1991 | US5072386 Method for culturally predictable keysort within a national language support (nls) data processing system |
12/10/1991 | US5072207 Device for generating a signal for one-bit masking at the time of a dynamic comparison of a mesh of serial data with a reference |
12/10/1991 | US5072130 Associative network and signal handling element therefor for processing data |
12/05/1991 | DE4017098A1 Digital subtractor for 59321 decimal code number - has input stage providing bi shifting for input to arithmetic stage |
12/05/1991 | DE4017097A1 Digital adder circuit - has inputs received by stage that effects bit shift prior to processing |
12/04/1991 | EP0459880A1 Device for the generation of combinations of numerical values and method for carrying it out |
12/04/1991 | EP0458898A1 Optimized division circuit |
12/03/1991 | US5070471 High speed multiplier which divides multiplying factor into parts and adds partial end products |
12/03/1991 | US5070456 Method for facilitating the sorting of national language keys in a data processing system |
12/03/1991 | US5070445 Programmably controlled partially distributed masking mechanism in a programmable unit having variable data path widths |
12/03/1991 | US5070312 Pulse width modulation circuit of programmable subframe system |
11/27/1991 | CN1014936B Bit-serial integrator circuitry |
11/26/1991 | US5068822 Single-stage extensible sorter for sorting data and efficiently reading out sorted data, incorporating single-bit devices |
11/26/1991 | US5068815 Optical full adder |
11/26/1991 | US5068784 Method and system for monitoring the number of available buffers |
11/26/1991 | US5068580 Electrical beam switch |
11/21/1991 | EP0457345A2 Information processing apparatus |
11/21/1991 | EP0393087A4 A bit string compressor with boolean operation processing capability |
11/19/1991 | US5067156 Method for generating a random number for the encoded transmission of data upon employment of a variable starting value |
11/19/1991 | CA1292321C Apparatus and method for using a single carry chain for leading one detection and for "stickey" bit calculation |
11/14/1991 | DE4014607A1 Electronic multiplier circuit based on serial application - carries out N-times addition of multiplicand and shifts intermediate product systems |
11/13/1991 | EP0456475A2 Programmable logic device |
11/12/1991 | US5065353 Adder control method and adder control circuit |
11/12/1991 | US5065352 Divide apparatus employing multiplier with overlapped partial quotients |
11/12/1991 | US5065256 Method of and apparatus for processing image signal |
11/12/1991 | CA1292074C Parallel arithmetic-logic unit for use as an element of a digital signal processor |
11/12/1991 | CA1292072C Serial arithmetic processor |
11/07/1991 | DE4014141A1 Digital multiplier circuit for 5211-coded decimal numbers - uses cumulative result register with unidirectional shift and three=phase internal timing signals |
11/07/1991 | DE3924404A1 Detecting artificially generated random number series - analysing arithmetic features in sequential samples to classify any given random series as natural or artificial |
11/06/1991 | EP0454882A1 Digital counter circuit |
11/05/1991 | US5063536 Microprogrammable asynchronous controllers for digital electronic systems |
11/05/1991 | US5063533 Reconfigurable deinterleaver/interleaver for block oriented data |
11/05/1991 | US5063530 Method of adding/subtracting floating-point representation data and apparatus for the same |
11/05/1991 | US5063354 Frequency synthesizing device |
10/31/1991 | WO1991013392A3 Easily configurable fully differential fast logic circuit |
10/31/1991 | DE4013621A1 Electronic multiplier circuit with pulse counter having 3 outputs - separately adds partial products to total intermediate product count using shift register movable in one direction |
10/30/1991 | EP0454636A1 Method for carrying out a boolean operation between any two bits of any two registers |
10/30/1991 | EP0454137A2 High speed processing apparatus |
10/30/1991 | EP0454050A2 Integrated circuit device for processing signals |
10/30/1991 | EP0453649A2 Method and apparatus for modeling words with composite Markov models |
10/30/1991 | EP0453641A2 CORDIC-processor for vector rotation with carry-save architecture |
10/30/1991 | EP0453600A1 Parallel adder |
10/30/1991 | EP0352279A4 Parallel string processor and method for a minicomputer |
10/30/1991 | CN1055833A Shift unit capable of completing any bit shift in single cycle |
10/30/1991 | CN1014557B Digital integrated circuit |
10/30/1991 | CN1014556B Chinese character input device |
10/29/1991 | US5062071 Programmable gain accumulator |
10/27/1991 | CA2038822A1 High speed processor for digital signal processing |
10/24/1991 | DE4012921A1 Electronic multiplier circuit with tetrade adders - has potential storage flip=flop controlling clock control clock switch stage and OR gate |
10/23/1991 | EP0452517A1 Comparator for two sums |
10/22/1991 | US5060265 Method of protecting a linear feedback shift register (LFSR) output signal |
10/22/1991 | US5060183 Parallel multiplier circuit using matrices, including half and full adders |
10/22/1991 | US5060182 Method and apparatus for performing the square root function using a rectangular aspect ratio multiplier |
10/22/1991 | US5060146 Multilingual indexing system for alphabetical lysorting by comparing character weights and ascii codes |
10/22/1991 | US5060143 System for string searching including parallel comparison of candidate data block-by-block |
10/22/1991 | US5059942 Bit masking compare circuit |
10/22/1991 | US5058750 Plant for the sorting of suspended articles and the use hereof |
10/22/1991 | CA1291267C Counter |
10/22/1991 | CA1291266C Bcd adder circuit |
10/17/1991 | WO1991015821A1 Incrementing subtractive circuits |
10/17/1991 | WO1991015820A1 Early scism alu status determination apparatus |
10/17/1991 | WO1991015819A1 High performance interlock collapsing scism alu apparatus |
10/17/1991 | DE4012226A1 Electronic multiplier circuit for digital values - has shift register controlled by pulse counter with two outputs |
10/16/1991 | EP0452099A2 Divider unit |
10/16/1991 | EP0451966A2 Method and apparatus for digital phased array imaging |
10/16/1991 | EP0451562A2 Data dependency collapsing hardware apparatus |
10/16/1991 | EP0395636A4 Parallel string processor and method for a minicomputer |
10/15/1991 | US5058161 Method and apparatus for secure identification and verification |
10/15/1991 | US5058146 Digital comparator, digital ratiometer and amplitude analyzer incorporating such ratiometers |
10/15/1991 | US5058137 Lempel-Ziv decoder |
10/15/1991 | US5058076 Address control circuit for data memory employed in signal delay circuit |
10/15/1991 | US5058048 Normalizing pipelined floating point processing unit |