| Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043) |
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| 07/20/1993 | US5230054 Priority order judging device |
| 07/20/1993 | US5229959 High order carry multiplexed adder |
| 07/20/1993 | CA1320587C Method and apparatus for implementing adaptive forward differencing using integer arithmetic |
| 07/15/1993 | DE4200511A1 Calculator circuitry for addition and subtraction - uses impulse counters with input clocks and groups of flip-flops |
| 07/14/1993 | EP0551214A2 Encoder, data detecting semiconductor integrated circuit applicable to the same and dynamic sense amplifier |
| 07/14/1993 | EP0551188A2 Hierarchical interconnection networks for parallel processing |
| 07/13/1993 | US5228126 Image data accelerated processing apparatus and method |
| 07/13/1993 | US5228054 Power-of-two length pseudo-noise sequence generator with fast offset adjustment |
| 07/13/1993 | US5227994 Inner product calculating circuit |
| 07/13/1993 | US5227993 Multivalued ALU |
| 07/13/1993 | US5227992 Operational method and apparatus over GF(2m) using a subfield GF(2.sup. |
| 07/13/1993 | US5227989 Arithmetic logic unit for microprocessor with sign bit extend |
| 07/13/1993 | US5227987 Digital signal processor for executing multichannel processing of analog inputs and outputs |
| 07/13/1993 | US5227865 BiCMOS sense amplifier having input waiting state |
| 07/13/1993 | US5227678 Fast digital comparison circuit for fuzzy logic operations |
| 07/08/1993 | WO1993013596A1 Circuit for generating variable-frequency pulses from periodic pulses |
| 07/08/1993 | DE4223999C1 Digital multiplication circuit using canonically signed digit code - has multiplexer converted and added to two's-complement value to generate reduced partial products that are added |
| 07/08/1993 | DE4200037A1 Arithmetic circuit for addition and subtraction - does not include decimal point shift register and associated circuitry, as it processes money calculations |
| 07/08/1993 | DE4200029A1 Arithmetic circuit for addition and subtraction calculations - has multiplying circuit enabling entered sum to be added to or subtracted from previous result specified number of times |
| 07/08/1993 | CA2124119A1 Circuit for generating variable-frequency pulses from periodic pulses |
| 07/08/1993 | CA2078912A1 Hierarchical interconnection networks for parallel processing |
| 07/07/1993 | EP0550188A2 Arithmetic system for performing integer power calculations |
| 07/06/1993 | US5226174 Character recognition system for determining a class of similarity based on computer distance with a smallest value indicating close similarity |
| 07/06/1993 | US5226135 Method for sorting vector data on the basis of partial vectors and vector processor |
| 07/06/1993 | US5226003 Multi-path multiplier |
| 07/06/1993 | CA1319998C Read-modify-write operation |
| 07/01/1993 | CA2084132A1 Data processing file format transparency system |
| 06/30/1993 | EP0548094A1 Active storage means in a reduction processor |
| 06/29/1993 | US5224165 High speed word generator |
| 06/29/1993 | US5224065 Arithmetic operation unit having bit inversion function |
| 06/29/1993 | US5224064 Transcendental function approximation apparatus and method |
| 06/23/1993 | EP0547835A2 An electronic circuit for performing floating point arithmetic functions |
| 06/23/1993 | EP0547230A1 Apparatus for sum-of-product operation |
| 06/22/1993 | US5222243 Sorting apparatus having plurality of registers with associated multiplexers and comparators for concurrently sorting and storing incoming data according to magnitude |
| 06/22/1993 | US5222241 Digital signal processor having duplex working registers for switching to standby state during interrupt processing |
| 06/22/1993 | US5222230 Circuitry for transferring data from a data bus and temporary register into a plurality of input registers on clock edges |
| 06/22/1993 | US5222110 Electronic counter for counting periodic clock signal generated at preset clock frequency |
| 06/22/1993 | US5222037 Floating-point processor for performing an arithmetic operation on fixed-point part data with high speed rounding of a result |
| 06/22/1993 | US5222036 Device and method for evaluating trigonometric functions |
| 06/17/1993 | DE4141011A1 Digital electronic circuit for addition and subtraction of 5211 code number - has input registers coupled to separate adder and subtractor units with output generated by result register |
| 06/17/1993 | DE4141003A1 Arithmetic circuit for addition and subtraction of 5211 code numbers - has input registers coupled to separate adder and subtractor logic with additional circuit for repetitive processing |
| 06/16/1993 | EP0546977A2 Method and apparatus for solving numerical problems that use a plurality of processing elements operating in parallel |
| 06/16/1993 | EP0546596A1 Device to carry out the processing of signals comprising a least squares method |
| 06/15/1993 | US5220670 Microprocessor having ability to carry out logical operation on internal bus |
| 06/15/1993 | US5220664 Merging network with three or more simultaneous inputs |
| 06/15/1993 | US5220618 Classification method implemented in a layered neural network for multiclass classification and layered neural network |
| 06/15/1993 | US5220615 Apparatus for and method of hough-converting coordinate data |
| 06/15/1993 | US5220589 Correction circuit for a floating-point amplifier |
| 06/15/1993 | US5220525 Recoded iterative multiplier |
| 06/15/1993 | US5220524 Machine method to perform newton iterations for reciprocals |
| 06/15/1993 | US5220306 Digital signal comparator for comparing n-bit binary signals |
| 06/10/1993 | WO1993011474A1 Control method and circuit |
| 06/09/1993 | EP0545654A2 Digital multiplier circuit |
| 06/09/1993 | EP0545183A1 Circuit arrangement for the production of binary pseudo random sequences |
| 06/09/1993 | DE4139945A1 Regelverfahren und regelkreis Control method and loop |
| 06/09/1993 | CN1073025A Transmission type carry (borrow) arithmetic operation unit |
| 06/08/1993 | US5218700 Apparatus and method for sorting a list of items |
| 06/08/1993 | US5218637 Method of transferring a secret, by the exchange of two certificates between two microcomputers which establish reciprocal authorization |
| 06/08/1993 | US5218565 Method and a circuit for encoding a digital signal to determine the scalar product of two vectors, and corresponding dct processing |
| 06/08/1993 | US5218564 Layout efficient 32-bit shifter/register with 16-bit interface |
| 06/08/1993 | US5218563 Data round-off device for rounding-off m-bit digital data into (m-n)-bit digital data |
| 06/08/1993 | US5218559 Pseudo-random generator |
| 06/03/1993 | DE4139526A1 Electronic computation circuit for addition and subtraction - contains two input shift registers with crossover feedback case dependent pulse cycle stage |
| 06/03/1993 | DE4139036A1 Electronic computation circuit for addition and subtraction - contains two input shift registers with crossover feedback, tetrad addition and subtraction stages, reset circuit |
| 06/03/1993 | DE4134119A1 Electronic computer circuit for addition and subtraction - contains one tetrad addition and two tetrad subtraction circuits and single results shift register |
| 06/02/1993 | EP0544370A2 Circuit structure having distributed registers with self-timed reading and writing operations |
| 06/02/1993 | EP0544127A2 Dynamic multi-mode parallel processor array architecture computer system |
| 06/02/1993 | CN1072788A Dynamic multi-mode parallel processor array architecture computer system |
| 06/01/1993 | US5216628 Absolute value arithmetic circuit |
| 06/01/1993 | US5216424 Binary data converter |
| 06/01/1993 | US5216420 Matrix sorting network for sorting N inputs onto N outputs |
| 05/28/1993 | CA2073516A1 Dynamic multi-mode parallel processor array architecture computer system |
| 05/27/1993 | WO1993010491A1 Digital adder having a high-speed low-capacitance carry bypass signal path |
| 05/27/1993 | WO1993008523A3 1-bit adder and multiplier containing a 1-bit adder |
| 05/27/1993 | DE4137740A1 Digital electronic circuit for addition and subtraction of 5211 code - has single processor circuit that is selectively switched for addition and subtraction operations |
| 05/27/1993 | DE4137180A1 Digital electronic adder and subtractor circuit of 5211 code - has adder and subtractor processing unit operated by signal generated by logic control circuit |
| 05/27/1993 | DE4137174A1 Digital electronic circuit for addition and subtraction of 5211 code - has gating circuit coupled between registers and processing logic for prevention of errors |
| 05/27/1993 | DE4136555A1 Digital electronic circuit for addition and subtraction of 5211 code - has registers coupled to separate adder and subtraction units with outputs generated by register stages |
| 05/27/1993 | DE4136554A1 Digital electronic circuit for addition and subtraction of 5211 code - has two input registers to receive code numbers, circuit which can be used to either add or subtract, and register to store result |
| 05/27/1993 | DE4135808A1 Digital electronic circuit for addition and subtraction of 5211 code - has code numbers processed by adder and subtractor units coupled to decimal point logic control stage |
| 05/27/1993 | DE4135788A1 Digital electronic circuit for addition and subtraction of 5211 code - has operation of tetrad circuit controlled by logic circuitry generating signals with decimal point control |
| 05/27/1993 | DE4135296A1 Digital electronic circuit for addition and subtraction of 5211 code - has registers coupled to inputs of separate adder and subtractor stages, with arithmetic operation regulated by control circuit |
| 05/27/1993 | DE4135290A1 Digital electronic circuit for addition and subtraction of 5211 code - has tetrade circuit for both addition and subtraction with control circuit for selection of operating mode |
| 05/27/1993 | DE4134635A1 Digital electronic circuit for addition and subtraction of 5211 code - has tetrade circuit for addition and subtraction with selection signals generated by control circuit |
| 05/27/1993 | DE4134112A1 Digital electronic circuit for addition and subtraction of 5211 code - has control circuit coupled to adder and subtractor circuits for continuous operation |
| 05/27/1993 | DE4133347A1 Digital electronic circuit for multiplication and division of 5211 code - has control circuit with pulse counter to generate control signals for processing |
| 05/27/1993 | DE4133321A1 Digital electronic circuit for addition and subtraction of 5211 code - has registers coupled to separate adder and subtractor with control circuit for generating pulses |
| 05/27/1993 | DE4133313A1 Digital electronic circuit for addition and subtraction - has input registers with adder and subtractor stages controlled by signals from common control circuit |
| 05/27/1993 | DE4133024A1 Digital electronic circuit for addition and subtraction - has input resistors coupled to adder and subtractors with outputs coupled to register controlled by counter generated signals |
| 05/27/1993 | DE4132547A1 Digital electronic circuit for addition and subtraction - has separate adder and subtractor stages coupled to result register, and control circuit |
| 05/27/1993 | DE4131957A1 Digital electronic circuit for addition and subtraction of 5211 code - has inputs handled by adder and subtractor units with outputs stored in shift registers |
| 05/27/1993 | CA2083532A1 Signal processing system involving a least squares method |
| 05/26/1993 | EP0543517A2 A circuit detecting the position of an extreme "1" bit in a binary number |
| 05/26/1993 | EP0543494A2 Method and apparatus for determining the product of two numbers |
| 05/26/1993 | EP0543024A1 Divider |
| 05/25/1993 | US5214774 Segmented memory transfer and message priority on synchronous/asynchronous data bus |
| 05/25/1993 | US5214599 Advanced dimensional processing with division |
| 05/25/1993 | US5214598 Unbiased bit disposal apparatus and method |
| 05/25/1993 | US5214580 Process for identifying discrete data representative of an input sample stream |
| 05/25/1993 | US5214327 Programmable logic device and storage circuit used therewith |