Patents
Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043)
02/1994
02/01/1994US5283755 Multiplier employing carry select or carry look-ahead adders in hierarchical tree configuration
02/01/1994US5283577 Word width reduction system for videosignal processing and transmission
01/1994
01/25/1994US5282156 For identifying a limited number of positions
01/25/1994US5282153 Arithmetic logic unit
01/25/1994US5282152 Integer-based 18-bit RGB to 5-bit gray scale conversion device and method therefor
01/25/1994US5281946 High-speed magnitude comparator circuit
01/25/1994US5281871 Majority logic circuit
01/25/1994CA1326559C Ultra-high speed two dimensional coordinate transform processor
01/20/1994WO1994001937A1 Single-stack implementation of a reed-solomon encoder/decoder
01/20/1994DE4223125A1 Arithmetic processor for multiplication, division, addition and subtraction - introduces extra control stage to enhance multiplier and subtractor circuit
01/19/1994EP0579527A1 Method for exchanging digital data with an asynchronous operator, digital register for the implementation of the method and calculation unit with such registers
01/19/1994EP0578950A2 Method and apparatus for converting floating-point pixel values to byte pixel values by table lookup
01/19/1994EP0578821A1 Semiconductor device
01/19/1994EP0578692A1 Position-sensing apparatus.
01/18/1994US5280620 Coupling network for a data processor, including a series connection of a cross-bar switch and an array of silos
01/18/1994US5280440 Parallel adding circuit using 3×3 matrix of ± quinary number representation
01/18/1994US5280439 Apparatus for determining booth recoder input control signals
01/15/1994CA2100388A1 Divider device to divide a first polynomial by a second one
01/12/1994EP0578206A2 A method and system for generating raster operation code
01/11/1994US5278987 For sorting records stored in a data memory
01/11/1994US5278783 Fast area-efficient multi-bit binary adder with low fan-out signals
01/11/1994US5278782 Square root operation device
01/11/1994US5278781 Digital signal processing system
01/11/1994US5277321 Paper sheet handling apparatus
01/07/1994CA2099914A1 Method and system for generating compiled raster operation code
01/05/1994EP0577483A1 Digital calculation method and arithmetic unit for its implementation
01/05/1994EP0577101A1 Multiplier accumulator
01/05/1994EP0577000A1 Method for performing public-key cryptography
01/05/1994EP0576701A1 Hearing aid
01/05/1994DE4221742A1 Combined electronic circuit for arithmetic multiplication and division - assembled from prior multiplying and dividing circuits, one main circuit and one pulse circuit
01/05/1994CN1080411A A circit and method for determining membership in a set during a fuzzy logic operation
01/04/1994US5276797 Dynamically extending selection choices
01/04/1994US5276741 Fuzzy string matcher
01/04/1994US5276635 Method and apparatus for performing carry look-ahead addition in a data processor
01/04/1994US5276634 Floating point data processing apparatus which simultaneously effects summation and rounding computations
01/04/1994US5276633 Sine/cosine generator and method
01/04/1994CA2008879C Serial word comparator
12/1993
12/30/1993CA2099209A1 Hearing aid
12/29/1993EP0576262A2 Apparatus for multiplying integers of many figures
12/29/1993EP0576154A1 Multiplication method and circuit
12/29/1993EP0519062A4 Very fast approximate string matching algorithms for multiple errors spelling correction
12/29/1993CN2151500Y Computer gamble machine
12/28/1993US5274835 Merge device using FIFO buffers
12/28/1993US5274830 Zero warranty circuit for data path having different bit width from the length of packed decimal operand
12/28/1993US5274805 Method of sorting and compressing data
12/28/1993US5274777 Digital data processor executing a conditional instruction within a single machine cycle
12/28/1993US5274742 Combination problem solving method and apparatus
12/28/1993US5274707 Modular exponentiation and reduction device and method
12/28/1993US5274581 Look up table implementation of fast carry for adders and counters
12/28/1993US5274580 Method for calculating the inverse of a number, and computer for performing the method
12/28/1993US5274277 High speed "OR" circuit configuration
12/28/1993CA1325681C Compiled objective referential constraints in a relational data base management system
12/23/1993WO1993026104A1 Device and method for detection of intermittently repeating information
12/23/1993WO1993025959A1 Process and configuration for establishing the sum of a chain of products
12/23/1993WO1993025958A1 Method of sorting and compressing data
12/23/1993DE4220337A1 Divider circuit forming result subtractively - has final right shifting of result number controlled by display circuit
12/23/1993DE4213102A1 Divider circuit forming result number subtractively - has impulse cycle supplying circuit with one-part impulse circuit in place of two-part impulse circuit
12/23/1993DE4212142A1 Divider circuit forming result number subtractively - has control circuit whose both impulse circuits have only one common impulse charging circuit
12/22/1993EP0575192A2 Finite state automaton text search apparatus having two-level memory structure
12/22/1993EP0575050A1 Clock distribution scheme for user-programmable logic array architecture
12/22/1993EP0575032A2 Paper sheet handling apparatus
12/22/1993EP0574938A2 System for detecting non-coincidence of codes
12/22/1993EP0574714A2 A method for performing a fuzzy logic operation in a data processor
12/22/1993EP0574672A1 Adjustable weighted random test pattern generator for logic circuits
12/22/1993EP0290111B1 Digital data processing system
12/21/1993US5272755 Secure communication network system for transmitting data
12/21/1993US5272662 Carry multiplexed adder
12/21/1993US5272661 Finite field parallel multiplier
12/21/1993US5272660 Method and apparatus for performing integer and floating point division using a single SRT divider in a data processor
12/21/1993US5272659 Engine control with fixed point digital overflow prevention
12/21/1993US5272654 System for converting a floating point signed magnitude binary number to a two's complement binary number
12/21/1993CA2006704C Total sum calculation circuit capable of rapidly calculating a total sum of more than two input data represented by a floating point representation
12/15/1993EP0574018A1 Accumulating multiplication circuit executing a double precision multiplication at a high speed
12/14/1993US5271061 Method and apparatus for public key exchange in a cryptographic system
12/14/1993US5270981 Field memory device functioning as a variable stage shift register with gated feedback from its output to its input
12/14/1993US5270962 Multiply and divide circuit
12/14/1993US5270956 System and method for performing fast algebraic operations on a permutation network
12/14/1993US5270955 Method of detecting arithmetic or logical computation result
12/14/1993CA1325281C Multiple function data processor
12/09/1993WO1993025005A1 Area-efficient implication circuits for very dense lukasiewicz logic arrays
12/09/1993WO1993024995A1 Shift and add digital signal processor
12/09/1993WO1993024880A2 Low-power area-efficient absolute value arithmetic unit
12/09/1993WO1993024879A1 Digital filter employing powers of 2 coefficients
12/09/1993DE4218769A1 Verfahren und Anordnung zum Bilden der Summe einer Kette von Produkten Method and device for forming the sum of a chain of products
12/08/1993EP0573023A1 Method for manufacturing liquid jet recording head
12/08/1993EP0572695A1 A digital circuit for calculating a logarithm of a number
12/08/1993EP0328619B1 Apparatus and method for using a single carry chain for leading one detection and for ''sticky'' bit calculation
12/08/1993EP0240546B1 Random sequence generators
12/08/1993CN1079349A Method and apparatus for modulo computation
12/07/1993US5269012 Stack memory system including an address buffer for generating a changed address by inverting an address bit
12/07/1993US5268858 Method and apparatus for negating an operand
12/07/1993US5268857 Device and method for approximating the square root of a number
12/07/1993US5268856 Bit serial floating point parallel processing system and method
12/07/1993US5268855 Common format for encoding both single and double precision floating point numbers
12/07/1993US5268854 Microprocessor with a function for three-dimensional graphic processing
12/07/1993US5268853 Orthogonal transformation processor for compressing information
12/07/1993US5268684 Apparatus for a neural network one-out-of-N encoder/decoder
12/01/1993EP0571694A1 Fast adder chain
12/01/1993EP0571693A1 Fast adder chain
12/01/1993EP0169908B1 Method and circuit for decoding error coded data