Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled
Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043)
06/1991
06/13/1991DE3940663A1 Electronic digit multiplier circuit - has only one product and circuit per product number and contains comparison side change circuit
06/13/1991DE3940662A1 Electronic digit decimal code multiplier circuit - contains auxiliary circuit for generating square product numbers, saves contra product and circuit
06/12/1991EP0431629A2 Mutual division circuit
06/12/1991EP0431570A2 Logical circuit
06/12/1991EP0431417A2 Method and apparatus for SRT divison using gray coded quotient bit signals
06/11/1991US5023908 Method and apparatus for personal identification
06/11/1991US5023828 Microinstruction addressing in high-speed CPU
06/11/1991US5023827 Radix-16 divider using overlapped quotient bit selection and concurrent quotient rounding and correction
06/11/1991US5023826 Apparatus for skipping arithmetic calculations involving leading zeros
06/11/1991US5023590 17-bit cascadable comparator using generic array logic
06/11/1991US5023484 Architecture of high speed synchronous state machine
06/06/1991DE3939842A1 Serial digit multiplier for several codes - has simple circuits for processing carries and tens values
06/06/1991DE3933429A1 Potential shift circuit which can be used as adder - has circuit stage contg. 3 non-dual single adder circuits
06/06/1991DE3931145A1 Electronic digit addition circuit for binary coded decimal numbers - contains value 5 processing dual full adder, adder stage not requiring additional carry processing input
06/05/1991EP0430441A2 Method and apparatus for correction of positive and negative overflow
06/05/1991CA2031360A1 Method and apparatus for srt division using gray coded quotient bit signals
06/04/1991US5021994 Look-ahead flag generator
06/04/1991US5021986 Total sum calculation circuit capable of rapidly calculating a total sum of more than two input data represented by a floating point representation
06/04/1991US5021985 Variable latency method and apparatus for floating-point coprocessor
05/1991
05/29/1991EP0428942A2 Plural-bit recoding multiplier
05/29/1991EP0428624A1 Intelligent scan image processor
05/29/1991DE3939323A1 Digit multiplier circuit with fixed value main stage - has side change circuit region without intersecting conductors and two product-AND circuits
05/28/1991US5020060 Error code correction device having a galois arithmetic unit
05/28/1991US5020017 Method and apparatus for obtaining the quotient of two numbers within one clock cycle
05/28/1991US5020016 Circuit for detecting zero result of addition/subtraction by simultaneously processing each pair of corresponding bits of a pair of given numbers in parralel
05/28/1991US5019968 Three-dimensional vector processor
05/22/1991EP0428504A2 Programmable logic device with programming verification means and method therefor
05/22/1991EP0428503A2 Programmable logic device with programmable output selection means
05/21/1991US5018099 Comparison circuit
05/21/1991US5018094 Modifying an n-digit input binary number
05/21/1991US5018093 High performance self-checking adder having small circuit area
05/21/1991US5018092 Stack-type arithmetic circuit
05/21/1991US5017817 Basic circuitry particularly for construction of multivalued logic systems
05/18/1991CA2030188A1 Method and apparatus for correction of underflow and overflow
05/16/1991WO1991006908A1 Circuitry and microprogramming of a non-von neumann computer for acquisition of an automatic programming (software)
05/16/1991DE3938032A1 Dual multiplier-divider circuit based on multiplier circuit - converts binary to BCD-8421-code in fixed value circuits with no end stages and hence no transistors
05/16/1991DE3934466A1 Self-clocking central processor unit - has operation processing time dependent speed and optimisation of speed by automatic compensation of temp. and voltage fluctuations
05/16/1991DE3930482A1 Electronic multiplier circuit contg. adder circuits - has shift registers that eliminates absolute need for additional potential storage row in output region
05/16/1991DE3930481A1 Electronic divider circuit - reduces number of stages by eliminating absolute need for potential storage row in output region
05/15/1991EP0427524A1 Adaptive rounder for video signals
05/15/1991EP0427464A2 Asychronous leading zero counter employing iterative cellular array
05/15/1991EP0426990A2 Method of and apparatus for data distribution
05/14/1991US5016211 Neural network implementation of a binary adder
05/14/1991US5016210 Binary division of signed operands
05/14/1991US5016209 Floating-point addition/subtraction system with digit position alignment between fractions of multiple sets of data
05/14/1991US5016208 Deferred comparison multiplier checker
05/14/1991US5016011 Increased performance of digital integrated circuits by processing with multiple-bit-width digits
05/14/1991US5015886 Programmable sequential-code recognition circuit
05/14/1991CA1284188C Parallel optical arithmetic/logic unit
05/08/1991EP0426655A2 Programmable logic device with configurable output enable means
05/08/1991DE3931951A1 Electronic digit subtraction circuit - has only 6 and circuits, 3 or circuits and one carry output for binary coded decimal numbers
05/08/1991DE3929346A1 Electronic multiplier-divider circuit - contains switchable adder-subtractor circuits and output stage requiring no potential storage series circuit
05/08/1991DE3928583A1 Electronic digit subtraction circuit for binary coded decimal numbers - is produced in 5211 form with code conversion circuits at inputs and outputs
05/07/1991US5014235 Convolution memory
05/07/1991US5014233 Divider for carrying out high speed arithmetic operation
05/07/1991CA1283981C Fast summing circuit
05/02/1991WO1991006060A1 Methods of realizing digital signal processors using a programmed compiler
05/02/1991EP0425410A2 Signal processor with independently arithmetic and logic unit and multiplier accumulator unit simultaneously operable
05/02/1991EP0425188A2 Stack design for processor
05/02/1991EP0424838A2 Arithmetic circuit for calculating and accumulating absolute values of the difference between two numerical values
05/02/1991EP0424618A2 Input/output system
05/02/1991EP0424410A1 Multiplier.
05/02/1991DE3934898A1 Binary multiplier circuit converting decimal numbers directly - adds binary coded partial products before conversion to 8421 code
04/1991
04/30/1991US5012441 Apparatus for addressing memory with data word and data block reversal capability
04/30/1991US5012439 Method and apparatus for performing division
04/30/1991US5012438 Reciprocal arithmetic circuit with ROM table
04/24/1991EP0424086A2 Arithmetic processing apparatus and method used thereby
04/24/1991EP0168406B1 Floating point condition code generation
04/23/1991US5010510 Multiplying unit circuit
04/23/1991US5010509 Accumulator for complex numbers
04/23/1991US5010508 Prenormalization for a floating-point adder
04/17/1991EP0171595B1 Floating point arithmetic unit
04/17/1991CN1012394B Dynamic adder
04/17/1991CN1012393B Processor
04/16/1991US5008886 Read-modify-write operation
04/16/1991US5008850 Circuitry for multiplying binary numbers
04/16/1991US5008849 Apparatus adding values represented as residues in modulo arithmetic
04/10/1991EP0421962A1 A method and device for performing an approximate arithmetical division
04/10/1991EP0421627A2 Memory device
04/10/1991EP0421092A2 Method and apparatus for performing mathematical functions using polynomial approximation and a rectangular aspect ratio multiplier
04/09/1991US5007056 Processing circuit having an error detecting and correcting circuit therein
04/09/1991US5007018 Vital processor implemented with non-vital hardware
04/09/1991US5007010 Fast BCD/binary adder
04/09/1991US5007009 Non-recovery parallel divider circuit
04/05/1991WO1991005305A1 A method and device for performing an approximate arithmetical division
04/04/1991WO1991004611A1 Word width reduction system for videosignal processing and transmission
04/04/1991WO1991004527A1 A search method and circuit
04/04/1991WO1991003014A3 Method and apparatus for high precision weighted random pattern generation
04/02/1991US5005150 Digital signal processors
04/02/1991US5005149 Digital computation integrated circuit for convolution type computations
03/1991
03/28/1991DE3931112A1 Potential shift circuit e.g. for adder - uses four outputs and four inputs with logic high and low potentials at either end of output potential chain
03/28/1991DE3930802A1 Adder circuit e.g. for 54321 coded decimal numbers - uses dual full-adder for processing five digit numbers
03/27/1991EP0419381A1 Absolute value determination circuit for radix-2 signed-digit numbers
03/27/1991EP0419126A2 System for generating anti-aliased video signal
03/27/1991EP0418412A1 Circuitry for sum-of-products calculation
03/27/1991EP0418220A1 Destination control logic for arithmetic and logic unit for digital data processor.
03/27/1991CN1012219B Distant tracking method for continuously finding moving object
03/26/1991US5003360 Semiconductor functional element
03/26/1991US5003286 Binary magnitude comparator with asynchronous compare operation and method therefor
03/26/1991US5003202 Coincidence extendable programmable logic device
1 ... 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 ... 931