Patents
Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043)
08/1991
08/20/1991US5041999 Logarithmic function arithmetic unit including means for separately processing pseudo division and multiplication
08/20/1991CA1287922C Apparatus and method for performing a shift operation in a multiplier array circuit
08/14/1991EP0441634A2 A DC-powered Josephson integrated circuit
08/14/1991EP0441533A2 Apparatus for sorting and storing data
08/14/1991EP0441121A2 Arithmetic operation apparatus for elementary function
08/14/1991EP0290589A4 Fully programmable linear feedback shift register
08/14/1991DE4004399A1 Word length limiting of carry save numbers - bits combined in exclusive or circuitry
08/13/1991US5040197 Fractional frequency divider for providing a symmetrical output signal
08/13/1991US5040139 Transmission gate multiplexer (TGM) logic circuits and multiplier architectures
08/13/1991US5040138 Circuit for simultaneous arithmetic calculation and normalization estimation
08/13/1991US5040136 Arithmetic circuit for calculating and accumulating absolute values of the difference between two numerical values
08/13/1991CA1287688C Double precision approximate quotient network
08/07/1991EP0440221A2 Priority encoder
08/07/1991EP0439507A1 Memory structure and method of utilization.
08/06/1991US5038315 Multiplier circuit
08/06/1991US5038314 Method and apparatus for correction of underflow and overflow
08/06/1991US5038313 Floating-point processor provided with high-speed detector of overflow and underflow exceptional conditions
07/1991
07/31/1991EP0439412A1 Serializer/deserializer
07/31/1991EP0439199A1 Programmable logic device with means for preloading storage cells therein
07/31/1991EP0439004A2 Barrel shifter
07/31/1991EP0438962A2 Method and apparatus for exponent adder
07/31/1991EP0438662A2 Apparatus and method of grouping utterances of a phoneme into context-de-pendent categories based on sound-similarity for automatic speech recognition
07/30/1991US5036483 Binary adding apparatus
07/30/1991US5036482 Method and circuitry for digital system multiplication
07/30/1991US5036457 Bit string compressor with boolean operation processing capability
07/25/1991DE4001555A1 Digital oscillator generating frequency controlled signal - forms transmission signal in accumulator, delayed by period dependent on accumulator content
07/24/1991EP0438322A2 Linear feedback shift register
07/24/1991EP0438126A2 Pipeline type digital signal processing device
07/24/1991EP0437876A1 Programmable serial multiplier
07/24/1991EP0331717B1 Fast multiplier circuit
07/24/1991CN1013315B Multibit digital threshold comparator
07/23/1991US5034912 Signal processing circuit for multiplication
07/23/1991US5034911 Signal parameterizer
07/23/1991US5034909 Digit-serial recursive filters
07/23/1991US5034908 Digit-serial transversal filters
07/23/1991US5034907 Dynamically configurable signal processor and processor arrangement
07/23/1991US5034906 Pseudorandom Binary Sequence delay systems
07/23/1991US5034900 Method and apparatus for bit operational process
07/23/1991CA1286779C Apparatus and method for an extended arithmetic logic unit for expediting selected floating point operations
07/18/1991DE4000924A1 Electronic divider circuit with additional shift register(s) - storing dividends or remainders and with results delivered in S211 code
07/17/1991EP0437207A2 Information processing system
07/17/1991EP0437127A1 Barrel shifter with parity bit generator
07/17/1991EP0437107A2 Method and apparatus for computing arithmetic expressions using on-line operands and bit-serial processing
07/17/1991EP0436905A2 High performance adder using carry predictions
07/16/1991WO1991010971A1 Handling system for information carriers
07/16/1991US5033017 Programmable logic array with reduced power consumption
07/16/1991US5032865 Calculating the dot product of large dimensional vectors in two's complement representation
07/16/1991US5031911 Ball-shooting game machine
07/16/1991CA1286413C Method and apparatus for a constant frequency clock source in phase with a variable frequency system clock
07/16/1991CA1286371C Input register for test operand generation
07/11/1991WO1991010182A1 Generator of multiple uncorrelated noise sources
07/11/1991DE4000586A1 Electronic multiplier with single direction shift register - uses feedback to eliminate need for shift register extension
07/10/1991EP0436106A2 High performance selfchecking counter having small circuit area
07/09/1991US5031138 Improved ratio decoder for use in a non-restoring binary division circuit
07/09/1991US5031137 Two input bit-serial multiplier
07/09/1991US5031136 Signed-digit arithmetic processing units with binary operands
07/09/1991US5031135 Device for multi-precision and block arithmetic support in digital processors
07/09/1991US5031134 System for evaluating multiple integrals
07/09/1991US5031129 Parallel pseudo-random generator for emulating a serial pseudo-random generator and method for carrying out same
07/04/1991DE3943209A1 Electronic multiplying circuit with two tetrad adder circuits - has carry addition circuits processes in 5211 code and AND=circuits
07/03/1991EP0435808A1 Method for place value assignment for sortable keys in a national language support (NLS) data processing system
07/03/1991EP0435807A2 Method for culturally predictable key sort within a national language support (NLS) data processing system
07/03/1991EP0435803A2 Method for key search within a national language support (NLS) data processing system
07/03/1991EP0435604A2 Apparatus for and method of hough-converting coordinate data
07/03/1991EP0435532A2 Method and apparatus for detecting certain runs of data in a data stream
07/03/1991EP0435478A2 Data processing system
07/03/1991EP0435399A1 Arithmetic processing unit to be associated with a microprocessor central unit
07/03/1991EP0435389A2 Differential input, differential output BiCMOS multiplexers and logic gates and an adder utilizing the same
07/03/1991EP0205523B1 Devices for the simultaneous activation of trains of commands and applications to memories
07/02/1991USRE33629 Numeric data processor
07/02/1991US5029123 Information processing device capable of indicating performance
07/02/1991US5029069 Data processor
06/1991
06/30/1991WO1991010190A1 Methods and apparatus for efficient resource allocation for error and exception handling in convergent division
06/30/1991WO1991010189A1 Binary floating point arithmetic rounding in conformance with ieee 754-1985 standard
06/30/1991WO1991010188A1 Method and processor for high-speed convergence factor determination
06/30/1991WO1991010187A1 METHOD AND APPARATUS FOR HIGH SPEED DETERMINATION OF Jth ROOTS AND RECIPROCALS OF Jth ROOTS
06/30/1991CA2047731A1 Method and apparatus for high speed determination of jth roots and reciprocals of jth roots
06/30/1991CA2047180A1 Methods and apparatus for efficient resource allocation for error and exception handling in convergent division
06/29/1991WO1991010186A1 High speed operation system
06/29/1991CA2072254A1 High speed operation system
06/26/1991EP0434586A2 Attribute-based method and apparatus of classification and retrieval
06/26/1991EP0434551A1 Method of generating a pseudo-random number in a dataprocessing-system, and a system for carrying out the method
06/26/1991EP0434550A1 Method of generating a pseudo-random number in a portable electronic objects system and a system for carrying out the method
06/26/1991EP0434381A2 Difference comparison between two asynchronous pointers and a programmable value
06/26/1991EP0433315A1 Circuits for adding or subtracting bcd-coded or dual-coded operands
06/25/1991US5027326 Self-timed sequential access multiport memory
06/25/1991US5027312 Carry-select adder
06/25/1991US5027311 Digital processor
06/25/1991US5027310 Carry chain incrementer and/or decrementer circuit
06/25/1991US5027309 Digital division circuit using N/M-bit subtractor for N subtractions
06/25/1991US5027308 Circuit for adding/subtracting two floating point operands
06/20/1991WO1991009382A1 Method for generating a random number in a system comprising portable electronic objects, and system for implementing said method
06/20/1991WO1991009381A1 Method for generating a random number in a data processing system, and system for implementing said method
06/20/1991DE3941930A1 Hard-wired multiplier circuit - has logic gates handling part products generated by 54321 inputs
06/19/1991EP0433269A2 Volume verification method and apparatus
06/18/1991US5025409 Carry propagation circuit of parallel-type full adder
06/18/1991US5025408 Bit serial multiplier with parallel-in-serial-out carry and partial product shift registers
06/18/1991US5025257 Increased performance of digital integrated circuits by processing with multiple-bit-width digits
06/18/1991CA1285075C Dual byte order computer architecture
06/18/1991CA1285034C Circuit for comparing magnitudes of binary signals