| Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043) |
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| 11/08/1994 | US5363322 Data processor with an integer multiplication function on a fractional multiplier |
| 11/08/1994 | US5363321 Digital circuit for calculating a logarithm of a number |
| 11/03/1994 | DE4311395A1 Multiplication circuit |
| 11/02/1994 | EP0622727A1 System for optimizing argument reduction |
| 11/02/1994 | EP0373175B1 Device for identification of messages |
| 11/01/1994 | US5361373 Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor |
| 10/27/1994 | WO1994024765A1 Sequentially clocked domino-logic cells |
| 10/27/1994 | WO1994024673A1 Data writing to non-volatile memory |
| 10/25/1994 | US5359718 Early scalable instruction set machine alu status prediction apparatus |
| 10/25/1994 | US5359551 High speed logarithmic function generating apparatus |
| 10/25/1994 | US5359549 Orthogonal transformation processor for compressing information |
| 10/25/1994 | US5359548 Floating-point arithmetic system having multiple-input addition and subtraction means |
| 10/25/1994 | US5359536 Programmable gate array with improved interconnect structure, input/output structure and configurable logic block |
| 10/25/1994 | US5359242 Programmable logic with carry-in/carry-out between logic blocks |
| 10/25/1994 | CA2006228C Multiplier |
| 10/19/1994 | EP0620518A1 Methods and apparatus for generating linear-feedback-shift-register sequences |
| 10/18/1994 | US5357528 Depth-2 threshold logic circuits for logic and arithmetic functions |
| 10/18/1994 | US5357457 Adder with carry look ahead circuit |
| 10/18/1994 | US5357456 Arithmetic circuit |
| 10/18/1994 | US5357455 Floating point remainder generator for a math processor |
| 10/18/1994 | US5357237 In a data processor a method and apparatus for performing a floating-point comparison operation |
| 10/18/1994 | US5357235 Parallelized magnitude comparator |
| 10/18/1994 | US5356144 Hand-held lottery number generating device |
| 10/13/1994 | DE4311487A1 Computing circuit for multiplication, addition and subtraction |
| 10/13/1994 | DE4307013A1 Multiplication-division circuit III |
| 10/13/1994 | DE4306991A1 Multiplication-division circuit |
| 10/13/1994 | DE4306989A1 Multiplication-division circuit |
| 10/13/1994 | DE4304885A1 Multiplication-division circuit |
| 10/13/1994 | DE4304884A1 Multiplication-division circuit |
| 10/13/1994 | DE4304480A1 Multiplication-division circuit |
| 10/12/1994 | EP0619557A2 A data processing system and method thereof |
| 10/12/1994 | EP0619542A2 Method and apparatus for multiplying a plurality of numbers |
| 10/12/1994 | EP0619051A1 Circuit for generating variable-frequency pulses from periodic pulses |
| 10/12/1994 | EP0383899B1 Failure detection for partial write operations for memories |
| 10/11/1994 | US5355509 Modular self-programmer |
| 10/11/1994 | US5355505 Method for simultaneously sorting data arrangement within movable demarcated blocks |
| 10/11/1994 | US5355478 Method for avoiding cache misses during external tournament tree replacement sorting procedures |
| 10/06/1994 | DE4310918A1 Multiplication circuit |
| 10/05/1994 | EP0618677A1 Programmable time-interval generator |
| 10/05/1994 | EP0618530A1 Finite state machine with means for the reduction of noise effects |
| 09/29/1994 | WO1994022097A1 Language-sensitive searching system |
| 09/29/1994 | WO1994022096A1 Language-sensitive collation system |
| 09/29/1994 | DE4409834A1 Multiplication circuit and division circuit |
| 09/29/1994 | DE4406489A1 Device for forwarding a transmission signal |
| 09/29/1994 | DE4309816A1 Multiplication circuit |
| 09/29/1994 | DE4309178A1 Multiplication circuit |
| 09/29/1994 | CA2145672A1 Language-sensitive collation system |
| 09/28/1994 | EP0489022B1 Electronic counting device |
| 09/27/1994 | US5351301 Authenticator circuit |
| 09/27/1994 | US5351297 Method of privacy communication using elliptic curves |
| 09/27/1994 | US5351207 Methods and apparatus for subtraction with 3:2 carry-save adders |
| 09/27/1994 | US5351206 Signed two's complement constant multiplier compiler |
| 09/27/1994 | US5350907 Handling system for information carriers |
| 09/27/1994 | CA1332196C Radix-16 divider using overlapped quotient bit selection and concurrent quotient rounding and correction |
| 09/22/1994 | DE4408789A1 Ein rechnergestütztes Verfahren zum Konstruieren eines Addierers mit vorgreifender Übertragsbildung A computerized method for constructing an adder with carry-generating anticipatory |
| 09/21/1994 | EP0616429A1 Method and circuit for generating a pseudo-random sequence and its use |
| 09/20/1994 | US5349687 Speech recognition system having first and second registers enabling both to concurrently receive identical information in one context and disabling one to retain the information in a next context |
| 09/20/1994 | US5349684 Sort and merge system using tags associated with the current records being sorted to lookahead and determine the next record to be sorted |
| 09/20/1994 | US5349681 Bit searching circuit and data processor including the same |
| 09/20/1994 | US5349676 Data acquisition systems with programmable bit-serial digital signal processors |
| 09/20/1994 | US5349551 Device for and method of preforming an N-bit modular multiplication in approximately N/2 steps |
| 09/20/1994 | US5349545 Arithmetic logic unit dequantization |
| 09/20/1994 | US5349353 Method and apparatus for mixed analog and digital processing of delta modulated pulse streams including digital-to-analog conversion of a digital input signal |
| 09/20/1994 | US5349250 Logic structure and circuit for fast carry |
| 09/15/1994 | WO1994020900A1 Video compression/decompression processing and processors |
| 09/14/1994 | EP0615199A1 Video compression/decompression using discrete cosine transformation |
| 09/13/1994 | US5347631 Bit aligned data block transfer method and apparatus |
| 09/13/1994 | US5347482 Multiplier tree using nine-to-three adders |
| 09/13/1994 | US5347481 Method and apparatus for multiplying denormalized binary floating point numbers without additional delay |
| 09/13/1994 | US5347480 Digital signal processing apparatus |
| 09/12/1994 | CA2091539A1 Video compression/decompression processing and processors |
| 09/07/1994 | EP0614191A2 Instruction memory system for risc microprocessor capable of preforming program counter relative addressing |
| 09/07/1994 | EP0614158A2 Frequency synthesizer |
| 09/06/1994 | US5345569 Apparatus and method for resolving dependencies among a plurality of instructions within a storage device |
| 09/06/1994 | US5345423 Parallel test circuit of a semiconductor memory device |
| 09/06/1994 | US5345410 Arithmetic-logic unit with modulo addition/substraction function and microprocessor using the same |
| 09/06/1994 | US5345405 Circuit for detecting the position of an extreme "1" bit in a binary number |
| 09/01/1994 | WO1994019762A1 Computing device |
| 09/01/1994 | WO1994019761A1 Semiconductor integrated circuit |
| 09/01/1994 | WO1994019760A1 Semiconductor device |
| 08/31/1994 | EP0613082A1 4:2 adder and multiplier circuit employing the same |
| 08/31/1994 | EP0541707B1 Sin/cos generator implementation |
| 08/31/1994 | EP0537205B1 Device for emulating neuronal networks and process for operating it |
| 08/30/1994 | US5343553 Digital fuzzy inference system using logic circuits |
| 08/30/1994 | US5343540 Method for detecting positions of consecutive bits set to predetermined codes |
| 08/30/1994 | US5343418 Three-to-two carry save adder cell |
| 08/30/1994 | US5343417 Fast multiplier |
| 08/30/1994 | US5343416 Method and apparatus for re-configuring a partial product reduction tree |
| 08/30/1994 | US5343413 Leading one anticipator and floating point addition/subtraction apparatus |
| 08/30/1994 | CA2050353C Method and processor for high-speed convergence factor determination |
| 08/25/1994 | DE4403917A1 Device to calculate an occupation count |
| 08/24/1994 | EP0612011A1 Digital integrator with reduced circuit area and analog-to-digital converter using same |
| 08/24/1994 | EP0612009A1 Detection of exponent underflow and overflow in a floating point adder |
| 08/24/1994 | EP0612008A1 Multiple level parallel magnitude comparator |
| 08/23/1994 | US5341335 Decimating filter |
| 08/23/1994 | US5341322 Bit level pipeline divide circuit and method therefor |
| 08/23/1994 | US5341321 Floating point arithmetic unit using modified Newton-Raphson technique for division and square root |
| 08/23/1994 | US5341320 Method for rapidly processing floating-point operations which involve exceptions |
| 08/23/1994 | US5341319 Method and apparatus for controlling a rounding operation in a floating point multiplier circuit |
| 08/18/1994 | WO1994018633A1 High speed function generating apparatus and method |