Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled
Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043)
11/1993
11/30/1993US5267187 Logic structure and circuit for fast carry
11/30/1993US5267186 Normalizing pipelined floating point processing unit
11/30/1993US5266918 Serial comparator
11/25/1993WO1993023815A1 Digital sensor signal numerical differentiation process
11/25/1993WO1993023804A1 Apparatus and method for random number generation
11/25/1993DE4216811A1 Verfahren zur numerischen Differentiation eines digitalen Sensorsignales Method for numerical differentiation of a digital sensor signal
11/24/1993EP0570950A2 Advanced parallel array processor (APAP)
11/24/1993EP0570608A1 Method and apparatus for counting digital pulses
11/24/1993EP0570531A1 One-dimensional interpolation circuit and method based on modification of a parallel multiplier
11/24/1993EP0300516B1 Digital data processing system
11/23/1993US5265260 High performance sort hardware for a database accelerator in a data processing system
11/23/1993US5265259 Blocks and bits sequence reversing device using barrel shift
11/23/1993US5265258 Partial-sized priority encoder circuit having look-ahead capability
11/23/1993US5265225 Digital signal processing address sequencer
11/23/1993US5265193 Efficiently organizing objects in a rete pattern matching network
11/23/1993US5265175 Data registration and search method
11/23/1993US5265044 High speed arithmetic and logic generator with reduced complexity using negative resistance
11/23/1993US5265043 Wallace tree multiplier array having an improved layout topology
11/18/1993EP0570067A2 Control device for interface control between a test machine and multi-channel electronic circuitry, in particular acording to Boundary Test Standard
11/18/1993EP0569881A1 Adder
11/18/1993DE4215466A1 Calculating circuit for addition and subtraction - has main circuit having only one changeover tetrade or belt circuit or two special tetrade circuits and one shift register
11/18/1993DE4210429A1 Electronic multiplier circuit forming result additively - has gate circuit supplying both digits to tetrade or band circuit and delivering result digit to result number memory row
11/16/1993US5262976 Plural-bit recoding multiplier
11/16/1993US5262975 Serial input multiplier apparatus
11/16/1993US5262974 Programmable canonic signed digit filter chip
11/16/1993US5262973 Method and apparatus for optimizing complex arithmetic units for trivial operands
11/16/1993US5262971 Bidirectional shifter
11/16/1993US5262969 Arrangement and method of ascertaining data word number of maximum or minimum in a plurality of data words
11/11/1993WO1993022721A1 Compact multiplier
11/11/1993WO1993022720A2 Process for finding the reciprocal of a divisor by stepwise approximation
11/11/1993DE4215347A1 Electronic calculator circuit detail improvements - uses multiplexed result/output display
11/11/1993DE4215332A1 ALU control circuitry for simple pocket calculators - has two input shift registers, intermediate store, and four decade ALU with gating circuit
11/10/1993EP0569135A2 Look up table implementation of fast carry for adders and counters
11/09/1993US5261090 Search arrangement adapted for data range detection
11/09/1993US5261077 Configurable data path arrangement for resolving data type incompatibility
11/09/1993US5261064 Burst access memory
11/09/1993US5261046 Resequencing line store device
11/09/1993US5261034 Graphics microcomputer for generating geometric figures
11/09/1993US5261028 Circuit for discriminating a given point within a predetermined area defined by two boundary values
11/09/1993US5261001 Microcircuit for the implementation of RSA algorithm and ordinary and modular arithmetic, in particular exponentiation, with large operands
11/09/1993US5260898 Result cache for complex arithmetic units
11/09/1993US5260897 Signal processing circuit
11/09/1993US5260890 Overflow detection system and its circuit for use in addition and subtraction
11/09/1993US5260889 Computation of sticky-bit in parallel with partial products in a floating point multiplier unit
11/09/1993US5260888 Shift and add digital signal processor
11/09/1993US5260887 Bit data shift amount detector
11/09/1993US5260706 Priority encoder
11/09/1993US5260680 For determining whether a binary value is within a range
11/09/1993CA1324217C Pipelined floating point adder for digital computer
11/04/1993DE4214108A1 Electronic computing circuit for addn. and subtraction - has decimal point processing facility and requires programming with number 1 only for both arithmetic operations
11/04/1993DE4214080A1 Electronic computing circuit for addn. and subtraction - has decimal point processing facility and requires programming with the number 1 only for both arithmetic operations
11/04/1993DE4213988A1 Random number generation using environmental background electric noise - producing bit sequence from non-periodic amplitudes of detected 3 K black-body radiation in excess of threshold level
11/03/1993EP0568424A1 Method for automatically generating an implicit representation of the prime implicants of a function
11/03/1993EP0568374A2 Parallelized magnitude comparator for comparing a binary number to a fixed value
11/03/1993EP0568373A2 Parallelized magnitude comparator
11/03/1993EP0568146A1 Neural processor with datanormalising means
11/03/1993EP0568145A1 Neural processor with means for calculating a norm or a distance
11/02/1993US5258945 Method and apparatus for generating multiples of BCD number
11/02/1993US5258944 High performance mantissa divider
11/02/1993US5258943 Apparatus and method for rounding operands
11/02/1993US5258936 Method and apparatus for generating pseudo-random numbers
11/02/1993US5258855 Information processing methodology
11/02/1993CA2093713A1 Fuzzy logic control method for reducing energy consumption in a machine for washing articles
11/02/1993CA1323939C Microinstruction addressing in high-speed cpu
10/1993
10/28/1993WO1993021577A1 Multiprocessor computer system and method for parallel processing of scalar operations
10/28/1993WO1993021576A1 Implementation techniques of self-checking arithmetic operators and data paths based on double-rail and parity codes
10/28/1993DE4213600A1 Digital electronic circuit for addition and subtraction - has input registers coupled to processor with result entered into register and with control for multiple additions and subtractions
10/28/1993DE4213104A1 Digital electronic circuit for addition and subtraction - has input shift registers with output decimal point control circuit and pulse generating stages for cycle operation
10/28/1993DE4213103A1 Digital electronic circuit for addition or subtraction - has input registers with arithmetic circuit output to memory with control circuit for changeover between addition and subtraction
10/27/1993EP0567269A2 Clock generators having programmable fractional frequency division
10/27/1993EP0567148A2 Operating circuit for galois field
10/26/1993US5257364 Method for generating a correlated sequence of variates with desired marginal distribution for testing a model of a communications system
10/26/1993US5257218 Parallel carry and carry propagation generator apparatus for use with carry-look-ahead adders
10/26/1993US5257217 Area-efficient multiplier for use in an integrated circuit
10/26/1993US5257216 Floating point safe instruction recognition apparatus
10/26/1993US5257214 Qualification of register file write enables using self-timed floating point exception flags
10/26/1993US5256994 Programmable secondary clock generator
10/21/1993DE4209390A1 Digital electronic circuit for addition and subtraction of coded numbers - has input shift register and result register coupled to pulse generating circuit for repeated addition or subtraction
10/21/1993DE4209380A1 Digital electronic circuit for addition and subtraction - has shift register stages that are controlled for multiple addition or subtraction using pulse generating circuit
10/21/1993DE4207927A1 Electronic digital circuit for addition or subtraction of coded numbers - has facility for multiple addition and subtraction operations with results stored in separate register
10/21/1993DE4207000A1 Digital electronic circuit for addition and subtraction of coded number - has input shift registers with control circuit for multiple addition or subtraction cycles
10/21/1993DE4206986A1 Digital electronic circuit for addition and subtraction of coded numbers - has input registers with separate results register controlled by counter based circuit
10/21/1993DE4206971A1 Digital electronic circuit for addition and subtraction of two coded numbers - has control circuit to provide for iterative addition and subtraction operations
10/21/1993DE4203821A1 Digital electronic circuit for addition and subtraction of coded numbers - has counter based control circuit for handling of decimal point processing of two coded input values
10/20/1993EP0566498A2 Digital signature device and process
10/20/1993EP0566215A2 Error correction apparatus
10/19/1993US5255221 Fully configurable versatile field programmable function element
10/19/1993US5255216 Reduced hardware look up table multiplier
10/19/1993US5255213 Apparatus for providing selectable fractional output signals
10/19/1993US5254886 Clock distribution scheme for user-programmable logic array architecture
10/14/1993WO1993020630A1 Power-of-two length pseudo-noise sequence generator with fast offset adjustment
10/14/1993WO1993020506A1 Semiconductor floor plan and method for a register renaming circuit
10/14/1993WO1993020503A1 Method and apparatus for modulo computation
10/14/1993WO1993020502A1 Exponential/logarithmic computational apparatus and method
10/14/1993WO1993020501A1 Integer-based 18-bit rgb to 5-bit gray scale conversion device and method therefor
10/14/1993DE4211676A1 Electronic divider circuit - contains gate circuit system combined with tetrade subtraction cicruit
10/13/1993EP0564752A1 A diagonal propagation digital multiplier
10/12/1993US5253215 Method and apparatus for high speed determination of jth roots and reciprocals of jth roots
10/12/1993US5253195 High speed multiplier
10/12/1993US5253194 Digital multiplier
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