Patents
Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043)
03/2000
03/02/2000WO2000011564A1 Uniform computing system with a dual-layer programmable structure
03/02/2000WO2000011546A1 Method and apparatus for concurrently executing multiplication and iterative operations
03/02/2000WO1999044329A3 Encryption processor with shared memory interconnect
02/2000
02/29/2000US6032268 Processor condition sensing circuits, systems and methods
02/29/2000US6032212 Device and method for interfacing PCI and VMEbus with a byte swapping circuit
02/29/2000US6032207 Search mechanism for a queue system
02/29/2000US6032170 Long instruction word controlling plural independent processor operations
02/29/2000US6032169 Arithmetic circuit for calculating a square
02/29/2000US6032168 Computer system to perform a filter operation using a logarithm and inverse-logarithm converter and methods thereof
02/29/2000US6032089 Vehicle instrument panel computer interface node
02/29/2000US6031408 Square-law clamping circuit
02/29/2000US6031391 Configuration memory integrated circuit
02/29/2000US6031390 Asynchronous registers with embedded acknowledge collection
02/24/2000WO2000010284A1 Method for improving random testing
02/24/2000WO2000010253A2 A method and apparatus for compressing signals in a fixed point format without introducing a bias
02/24/2000WO2000010089A1 Content addressable memory addressable by redundant form input data
02/24/2000DE19837101A1 Programmierbare 1-Bit Datenverarbeitungsanordnung Programmable 1-bit data processing device
02/24/2000CA2340421A1 A method and apparatus for compressing signals in a fixed point format without introducing a bias
02/23/2000EP0981081A2 Random number generating apparatus
02/23/2000EP0981080A1 Carry look-ahead addition circuits
02/23/2000EP0981079A2 Programmable one bit data processing apparatus
02/23/2000EP0980605A2 Mask generating polynomials for pseudo-random noise generators
02/22/2000US6029243 Floating-point processor with operand-format precision greater than execution precision
02/22/2000US6029187 Fast regular multiplier architecture
02/22/2000US6028987 Method of operation of arithmetic and logic unit, storage medium, and arithmetic and logic unit
02/22/2000US6028962 System and method for variable encoding based on image content
02/22/2000US6028528 Apparatus and methods for managing transfers of video recording media used for surveillance from vehicles
02/22/2000US6028453 Charge recycling differential logic (CRDL) circuit having true single-phase clocking scheme
02/22/2000US6028452 Method and apparatus for a fast variable precedence priority encoder with optimized round robin precedence update scheme
02/17/2000WO2000008549A1 Broken stack priority encoder
02/17/2000CA2339358A1 Broken stack priority encoder
02/16/2000EP0868689A4 A method and apparatus for executing floating point and packed data instructions using a single register file
02/16/2000CN1244943A Recording/reproducing device and recording/reproducing method
02/16/2000CN1049516C Data writing to non-volatile memory
02/15/2000US6026483 Method and apparatus for simultaneously performing arithmetic on two or more pairs of operands
02/15/2000US6026423 Fractional precision integer square root processor and method for use with electronic circuit breaker systems
02/15/2000US6026421 Apparatus for multiprecision integer arithmetic
02/15/2000US6026420 High-speed evaluation of polynomials
02/15/2000CA2138262C Minimum/maximum data detector
02/10/2000WO2000007095A1 Method and device for generating clock signals
02/10/2000DE19834076A1 Anordnung zur elektronischen Verarbeitung von Datensignalen Arrangement for the electronic processing of data signals
02/09/2000EP0978782A1 Sorting system and method
02/09/2000EP0978061A1 Object graph editing context and methods of use
02/09/2000EP0978047A1 Communication system with a master station and at least one slave station
02/08/2000US6023751 Computer system and method for evaluating predicates and Boolean expressions
02/08/2000US6023421 Selective connectivity between memory sub-arrays and a hierarchical bit line structure in a memory array
02/03/2000WO2000005837A1 Timing attack resistant cryptographic system
02/03/2000WO2000005645A1 Circuit and method of modulo multiplication
02/03/2000WO1999046658A3 Method and apparatus for creation and management of a portfolio of securities
02/02/2000EP0977358A2 An integrator circuit using an amplifier
02/02/2000EP0977116A2 Data processing apparatus and method
02/02/2000EP0977108A2 Apparatus for electronically processing data signals
02/02/2000EP0976027A1 Arithmetic processor
02/01/2000US6021424 Booth multiplier with low power, high performance input circuitry
02/01/2000US6021422 Partitioning of binary quad word format multiply instruction on S/390 processor
02/01/2000US6021420 Matrix transposition device
02/01/2000US6021407 Partitioning and sorting logical units of data prior to reaching an end of the data file
02/01/2000US6021275 Object code structure and method for translation of architecture independent program implementations
02/01/2000US6021231 Video retrieval method and apparatus
02/01/2000US6020754 Look up table threshold gates
01/2000
01/29/2000CA2278973A1 A fully integrated long time constant integrator circuit
01/28/2000CA2273710A1 Data processing apparatus and method
01/27/2000WO2000004443A1 Byte reordering apparatus and method
01/27/2000DE19826802A1 Verfahren zur Erzeugung einer Zufallszahl auf quantenmechanischer Grundlage und Zufallsgenerator A method for generating a random number on a quantum mechanical basis and random
01/26/2000EP0974968A2 An error correction system for a compact disk drive
01/26/2000EP0974913A1 Information processing system, enciphering/deciphering system, system lsi, and electronic apparatus
01/26/2000EP0974112A1 Method for designing complex, digital and integrated circuits and a circuit structure for carrying out said method
01/25/2000US6018758 Squarer with diagonal row merged into folded partial product array
01/25/2000US6018757 Zero detect for binary difference
01/25/2000US6018756 Reduced-latency floating-point pipeline using normalization shifts of both operands
01/25/2000US6018752 Microprocessor for performing unsigned operations with signed instructions
01/25/2000US6018751 Microprocessor for performing signed operations with unsigned instructions
01/25/2000US6018626 Error correction method and apparatus for disk drive emulator
01/25/2000US6018612 Arrangement for storing an information signal in a memory and for retrieving the information signal from said memory
01/25/2000US6018552 Differential detection receiver
01/25/2000US6018258 Variably adjustable clock divider
01/19/2000EP0973267A2 Error correction method
01/19/2000EP0973090A2 Random-number generating method and apparatus and storage medium therefor
01/19/2000EP0973089A2 Method and apparatus for computing floating point data
01/19/2000EP0972243A1 Polynomial calculator device, and method therefor
01/19/2000EP0972236A1 A sum of the absolute values generator
01/19/2000CN1241749A Multifunctional data comparing method and device
01/19/2000CN1241748A Bit-depth increase by bit replication
01/19/2000CN1048596C Rectifying transfer gate circuit
01/18/2000US6016457 Vehicle drive force controller
01/18/2000CA2132691C Method of verification of a finite state sequential machine and resulting information support and verification tool
01/12/2000EP0971483A2 Deinterleaving device
01/12/2000EP0971331A1 Method and apparatus for arithmetic operation and recording medium of method of operation
01/12/2000EP0969986A1 Integrated circuit card type car audio system and operating method
01/12/2000EP0847552A4 An apparatus for performing multiply-add operations on packed data
01/11/2000US6014738 Method for computing a difference in a digital processing system
01/11/2000US6014733 Method and system for creating a perfect hash using an offset table
01/11/2000US6014684 Method and apparatus for performing N bit by 2*N-1 bit signed multiplication
01/11/2000US6014683 Arithmetic operation system for arithmetically operating a first operand having an actual point and a second operand having no actual point
01/11/2000US6014659 Compressed prefix matching database searching
01/11/2000US6014074 Binary comparator
01/11/2000CA2164792C Allowed cell rate reciprocal approximation in rate-based available bit rate schedulers
01/11/2000CA2016854C Electrical computer and data processing system for receiving and processing data and associated method
01/06/2000WO2000001159A1 Methods and apparatus for implementing a sign function
01/04/2000US6012139 Microprocessor including floating point unit with 16-bit fixed length instruction set